1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
|
(*
Copyright (c) 2016-18 David C.J. Matthews
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License version 2.1 as published by the Free Software Foundation.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*)
signature X86IDENTIFYREFSSIG =
sig
type x86ICode and reg and preg and basicBlock and controlFlow
and argument and memoryIndex and regProperty and ccRef
datatype outCCState = CCSet of ccRef | CCIndeterminate | CCUnchanged
type intSet
type regState =
{
active: int, refs: int, pushState: bool, prop: regProperty
}
(* Simple basic block with register usage information. *)
datatype extendedBasicBlock =
ExtendedBasicBlock of
{
block: {instr: x86ICode, current: intSet, active: intSet, kill: intSet } list,
flow: controlFlow,
locals: intSet, (* Defined and used entirely within the block. *)
imports: intSet, (* Defined outside the block, used inside it, but not needed afterwards. *)
exports: intSet, (* Defined within the block, possibly used inside, but used outside. *)
passThrough: intSet, (* Active throughout the block. May be referred to by it but needed afterwards. *)
loopRegs: intSet, (* Destination registers for a loop. They will be updated by this block. *)
initialStacks: intSet, (* Stack items required at the start i.e. imports+passThrough for stack items. *)
inCCState: ccRef option, (* The state this block assumes. If SOME _ all predecessors must set it. *)
outCCState: ccRef option (* The condition code set by this block. SOME _ if at least one successor needs it. *)
}
val identifyRegisters: basicBlock vector * regProperty vector -> extendedBasicBlock vector * regState vector
(* Get the registers for an instruction. *)
val getInstructionRegisters: x86ICode -> { sources: preg list, dests: preg list }
val getInstructionCC: x86ICode -> outCCState
val argRegs: argument -> preg list
and argIndex: memoryIndex -> preg list
structure Sharing:
sig
type x86ICode = x86ICode
and reg = reg
and preg = preg
and intSet = intSet
and basicBlock = basicBlock
and extendedBasicBlock = extendedBasicBlock
and controlFlow = controlFlow
and argument = argument
and memoryIndex = memoryIndex
and regProperty = regProperty
and ccRef = ccRef
and outCCState = outCCState
end;
end;
|
