package info
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Folder: tiledata
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.. (parent) | |||
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d | rwxr-xr-x | 28 | BANKREF0 |
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d | rwxr-xr-x | 28 | BANKREF1 |
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d | rwxr-xr-x | 28 | BANKREF2 |
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d | rwxr-xr-x | 28 | BANKREF2A |
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d | rwxr-xr-x | 28 | BANKREF3 |
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d | rwxr-xr-x | 28 | BANKREF4 |
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d | rwxr-xr-x | 28 | BANKREF6 |
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d | rwxr-xr-x | 20 | BANKREF7 |
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d | rwxr-xr-x | 20 | BANKREF7A |
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d | rwxr-xr-x | 28 | BANKREF8 |
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d | rwxr-xr-x | 28 | BMID_0H |
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d | rwxr-xr-x | 28 | BMID_0V |
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d | rwxr-xr-x | 28 | BMID_2 |
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d | rwxr-xr-x | 28 | BMID_2V |
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d | rwxr-xr-x | 28 | CIB |
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d | rwxr-xr-x | 28 | CIB_DCU0 |
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d | rwxr-xr-x | 20 | CIB_DCU1 |
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d | rwxr-xr-x | 20 | CIB_DCU2 |
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d | rwxr-xr-x | 28 | CIB_DCU3 |
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d | rwxr-xr-x | 28 | CIB_DCUA |
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d | rwxr-xr-x | 28 | CIB_DCUB |
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d | rwxr-xr-x | 28 | CIB_DCUC |
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d | rwxr-xr-x | 28 | CIB_DCUD |
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d | rwxr-xr-x | 28 | CIB_DCUF |
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d | rwxr-xr-x | 28 | CIB_DCUG |
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d | rwxr-xr-x | 20 | CIB_DCUH |
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d | rwxr-xr-x | 20 | CIB_DCUI |
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d | rwxr-xr-x | 28 | CIB_DSP |
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d | rwxr-xr-x | 28 | CIB_EBR |
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d | rwxr-xr-x | 28 | CIB_EFB0 |
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d | rwxr-xr-x | 28 | CIB_EFB1 |
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d | rwxr-xr-x | 28 | CIB_LR |
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d | rwxr-xr-x | 28 | CIB_LR_S |
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d | rwxr-xr-x | 28 | CIB_PLL0 |
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d | rwxr-xr-x | 20 | CIB_PLL1 |
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d | rwxr-xr-x | 20 | CIB_PLL2 |
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d | rwxr-xr-x | 28 | CIB_PLL3 |
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d | rwxr-xr-x | 28 | CMUX_LL_0 |
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d | rwxr-xr-x | 28 | CMUX_LR_0 |
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d | rwxr-xr-x | 28 | CMUX_UL_0 |
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d | rwxr-xr-x | 28 | CMUX_UR_0 |
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d | rwxr-xr-x | 28 | DCU0 |
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d | rwxr-xr-x | 28 | DCU1 |
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d | rwxr-xr-x | 20 | DCU2 |
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d | rwxr-xr-x | 20 | DCU3 |
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d | rwxr-xr-x | 28 | DCU4 |
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d | rwxr-xr-x | 28 | DCU5 |
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d | rwxr-xr-x | 28 | DCU6 |
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d | rwxr-xr-x | 28 | DCU7 |
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d | rwxr-xr-x | 28 | DCU8 |
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d | rwxr-xr-x | 28 | DDRDLL_LL |
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d | rwxr-xr-x | 28 | DDRDLL_LR |
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d | rwxr-xr-x | 20 | DDRDLL_UL |
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d | rwxr-xr-x | 20 | DDRDLL_ULA |
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d | rwxr-xr-x | 28 | DDRDLL_UR |
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d | rwxr-xr-x | 28 | DDRDLL_URA |
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d | rwxr-xr-x | 28 | DSP_CMUX_UL |
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d | rwxr-xr-x | 28 | DSP_CMUX_UR |
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d | rwxr-xr-x | 28 | DSP_SPINE_UL0 |
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d | rwxr-xr-x | 28 | DSP_SPINE_UL1 |
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d | rwxr-xr-x | 28 | DSP_SPINE_UR0 |
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d | rwxr-xr-x | 20 | DSP_SPINE_UR1 |
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d | rwxr-xr-x | 20 | DTR |
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d | rwxr-xr-x | 28 | DUMMY_TILE_0 |
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d | rwxr-xr-x | 28 | DUMMY_TILE_1 |
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d | rwxr-xr-x | 28 | DUMMY_TILE_2 |
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d | rwxr-xr-x | 28 | DUMMY_TILE_4 |
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d | rwxr-xr-x | 28 | DUMMY_TILE_5 |
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d | rwxr-xr-x | 28 | DUMMY_TILE_6 |
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d | rwxr-xr-x | 28 | DUMMY_TILE_7 |
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d | rwxr-xr-x | 20 | DUMMY_TILE_8 |
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d | rwxr-xr-x | 20 | DUMMY_TILE_A |
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d | rwxr-xr-x | 28 | DUMMY_TILE_E |
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d | rwxr-xr-x | 28 | DUMMY_TILE_F |
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d | rwxr-xr-x | 28 | DUMMY_TILE_S |
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d | rwxr-xr-x | 28 | DUMMY_TILE_T |
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d | rwxr-xr-x | 28 | EBR_CMUX_LL |
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d | rwxr-xr-x | 28 | EBR_CMUX_LL_25K |
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d | rwxr-xr-x | 28 | EBR_CMUX_LR |
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d | rwxr-xr-x | 20 | EBR_CMUX_LR_25K |
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d | rwxr-xr-x | 20 | EBR_CMUX_UL |
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d | rwxr-xr-x | 28 | EBR_CMUX_UR |
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d | rwxr-xr-x | 28 | EBR_SPINE_LL0 |
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d | rwxr-xr-x | 28 | EBR_SPINE_LL1 |
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d | rwxr-xr-x | 28 | EBR_SPINE_LL2 |
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d | rwxr-xr-x | 28 | EBR_SPINE_LL3 |
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d | rwxr-xr-x | 28 | EBR_SPINE_LR0 |
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d | rwxr-xr-x | 28 | EBR_SPINE_LR1 |
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d | rwxr-xr-x | 20 | EBR_SPINE_LR2 |
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d | rwxr-xr-x | 20 | EBR_SPINE_UL0 |
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d | rwxr-xr-x | 28 | EBR_SPINE_UL1 |
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d | rwxr-xr-x | 28 | EBR_SPINE_UL2 |
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d | rwxr-xr-x | 28 | EBR_SPINE_UR0 |
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d | rwxr-xr-x | 28 | EBR_SPINE_UR1 |
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d | rwxr-xr-x | 28 | EBR_SPINE_UR2 |
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d | rwxr-xr-x | 28 | ECLK_L |
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d | rwxr-xr-x | 28 | ECLK_R |
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d | rwxr-xr-x | 20 | EFB0_PICB0 |
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d | rwxr-xr-x | 20 | EFB1_PICB1 |
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d | rwxr-xr-x | 28 | EFB2_PICB0 |
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d | rwxr-xr-x | 28 | EFB3_PICB1 |
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d | rwxr-xr-x | 28 | LMID_0 |
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d | rwxr-xr-x | 28 | MIB2_DSP0 |
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d | rwxr-xr-x | 28 | MIB2_DSP1 |
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d | rwxr-xr-x | 28 | MIB2_DSP2 |
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d | rwxr-xr-x | 28 | MIB2_DSP3 |
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d | rwxr-xr-x | 20 | MIB2_DSP4 |
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d | rwxr-xr-x | 20 | MIB2_DSP5 |
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d | rwxr-xr-x | 28 | MIB2_DSP6 |
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d | rwxr-xr-x | 28 | MIB2_DSP7 |
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d | rwxr-xr-x | 28 | MIB2_DSP8 |
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d | rwxr-xr-x | 28 | MIB_CIB_LR |
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d | rwxr-xr-x | 28 | MIB_CIB_LRC |
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d | rwxr-xr-x | 28 | MIB_CIB_LRC_A |
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d | rwxr-xr-x | 28 | MIB_CIB_LR_A |
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d | rwxr-xr-x | 20 | MIB_CIB_LX |
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d | rwxr-xr-x | 20 | MIB_CIB_RX |
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d | rwxr-xr-x | 28 | MIB_DSP0 |
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d | rwxr-xr-x | 28 | MIB_DSP1 |
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d | rwxr-xr-x | 28 | MIB_DSP2 |
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d | rwxr-xr-x | 28 | MIB_DSP3 |
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d | rwxr-xr-x | 28 | MIB_DSP4 |
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d | rwxr-xr-x | 28 | MIB_DSP5 |
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d | rwxr-xr-x | 28 | MIB_DSP6 |
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d | rwxr-xr-x | 20 | MIB_DSP7 |
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d | rwxr-xr-x | 20 | MIB_DSP8 |
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d | rwxr-xr-x | 28 | MIB_EBR0 |
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d | rwxr-xr-x | 28 | MIB_EBR1 |
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d | rwxr-xr-x | 28 | MIB_EBR2 |
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d | rwxr-xr-x | 28 | MIB_EBR3 |
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d | rwxr-xr-x | 28 | MIB_EBR4 |
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d | rwxr-xr-x | 28 | MIB_EBR5 |
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d | rwxr-xr-x | 28 | MIB_EBR6 |
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d | rwxr-xr-x | 20 | MIB_EBR7 |
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d | rwxr-xr-x | 20 | MIB_EBR8 |
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d | rwxr-xr-x | 28 | OSC |
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d | rwxr-xr-x | 28 | PICB0 |
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d | rwxr-xr-x | 28 | PICB1 |
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d | rwxr-xr-x | 28 | PICL0 |
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d | rwxr-xr-x | 28 | PICL0_DQS2 |
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d | rwxr-xr-x | 28 | PICL1 |
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d | rwxr-xr-x | 28 | PICL1_DQS0 |
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d | rwxr-xr-x | 20 | PICL1_DQS3 |
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d | rwxr-xr-x | 20 | PICL2 |
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d | rwxr-xr-x | 28 | PICL2_DQS1 |
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d | rwxr-xr-x | 28 | PICR0 |
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d | rwxr-xr-x | 28 | PICR0_DQS2 |
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d | rwxr-xr-x | 28 | PICR1 |
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d | rwxr-xr-x | 28 | PICR1_DQS0 |
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d | rwxr-xr-x | 28 | PICR1_DQS3 |
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d | rwxr-xr-x | 28 | PICR2 |
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d | rwxr-xr-x | 20 | PICR2_DQS1 |
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d | rwxr-xr-x | 20 | PICT0 |
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d | rwxr-xr-x | 28 | PICT1 |
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d | rwxr-xr-x | 28 | PIOT0 |
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d | rwxr-xr-x | 28 | PIOT1 |
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d | rwxr-xr-x | 28 | PLC2 |
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d | rwxr-xr-x | 28 | PLL0_LL |
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d | rwxr-xr-x | 28 | PLL0_LR |
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d | rwxr-xr-x | 28 | PLL0_UL |
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d | rwxr-xr-x | 20 | PLL0_UR |
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d | rwxr-xr-x | 20 | PLL1_LR |
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d | rwxr-xr-x | 28 | PLL1_UL |
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d | rwxr-xr-x | 28 | PLL1_UR |
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d | rwxr-xr-x | 28 | POR |
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d | rwxr-xr-x | 28 | PVT_COUNT2 |
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d | rwxr-xr-x | 28 | RMID_0 |
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d | rwxr-xr-x | 28 | SPICB0 |
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d | rwxr-xr-x | 28 | TAP_DRIVE |
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d | rwxr-xr-x | 20 | TAP_DRIVE_CIB |
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d | rwxr-xr-x | 20 | TMID_0 |
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d | rwxr-xr-x | 28 | TMID_1 |
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d | rwxr-xr-x | 28 | VCIB_DCU0 |
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d | rwxr-xr-x | 28 | VCIB_DCU1 |
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d | rwxr-xr-x | 28 | VCIB_DCU2 |
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d | rwxr-xr-x | 28 | VCIB_DCU3 |
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d | rwxr-xr-x | 28 | VCIB_DCUA |
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d | rwxr-xr-x | 28 | VCIB_DCUB |
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d | rwxr-xr-x | 20 | VCIB_DCUC |
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d | rwxr-xr-x | 20 | VCIB_DCUD |
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d | rwxr-xr-x | 28 | VCIB_DCUF |
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d | rwxr-xr-x | 28 | VCIB_DCUG |
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d | rwxr-xr-x | 28 | VCIB_DCUH |
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d | rwxr-xr-x | 28 | VCIB_DCUI |
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d | rwxr-xr-x | 28 | VIQ_BUF |