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Plan #1.
This plan is finished in PROLL ID02, works on MrCoffee.
We keep this document around as an education aid.
- SKIPPED Verify PROM (1.x, 2.x, 3.x, 1275, no PROM).
* Verify system type: MrCoffee, SPARCbook-1, Espresso
= Done CPU
- SKIPPED the rest - we build different images for different machines.
* Map ourselves from low memory into PROLBASE.
* Build trap tables
* Collect data about hardware (Memory amount & layout).
* Switch mappings to our own in low memory, sidestep PROM.
* Move itself out of kernel way:
= Make low 1-to-1 mappings;
= Find place in high memory, e.g. new base physaddr
= Jump back low;
= Map ourselves from high phys to high virt, flush TLB.
= Copy ourselves up
= Jump high
* Re build page tables, now located high
* Open interrupts ?
- We did not need this yet, but perhaps in future...
* Set up romvec and device tree (openprom.c)
* Initiate the network - RARP/BOOTP/DHCP.
* Load kernel and jump
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