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#DPATCHLEVEL=1
diff -ur qemu-0.8.0/hw/serial.c qemu-0.8.0-mine/hw/serial.c
--- qemu-0.8.0/hw/serial.c 2005-12-19 23:51:53.000000000 +0100
+++ qemu-0.8.0-mine/hw/serial.c 2006-01-14 20:33:41.000000000 +0100
@@ -71,7 +71,7 @@
#define UART_LSR_DR 0x01 /* Receiver data ready */
struct SerialState {
- uint8_t divider;
+ uint16_t divider;
uint8_t rbr; /* receive register */
uint8_t ier;
uint8_t iir; /* read only */
@@ -310,7 +310,7 @@
{
SerialState *s = opaque;
- qemu_put_8s(f,&s->divider);
+ qemu_put_be16s(f,&s->divider);
qemu_put_8s(f,&s->rbr);
qemu_put_8s(f,&s->ier);
qemu_put_8s(f,&s->iir);
@@ -328,7 +328,7 @@
if(version_id != 1)
return -EINVAL;
- qemu_get_8s(f,&s->divider);
+ qemu_get_be16s(f,&s->divider);
qemu_get_8s(f,&s->rbr);
qemu_get_8s(f,&s->ier);
qemu_get_8s(f,&s->iir);
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