File: aspeed_lpc.h

package info (click to toggle)
qemu 1%3A10.0.3%2Bds-3
  • links: PTS, VCS
  • area: main
  • in suites: sid
  • size: 413,680 kB
  • sloc: ansic: 4,733,433; pascal: 114,769; python: 105,506; asm: 68,431; sh: 52,881; makefile: 27,469; perl: 18,778; cpp: 11,435; xml: 3,404; objc: 2,877; yacc: 2,505; php: 1,299; tcl: 1,296; lex: 1,110; sql: 71; awk: 43; sed: 35; javascript: 7
file content (45 lines) | stat: -rw-r--r-- 931 bytes parent folder | download | duplicates (7)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
/*
 *  ASPEED LPC Controller
 *
 *  Copyright (C) 2017-2018 IBM Corp.
 *
 * This code is licensed under the GPL version 2 or later.  See
 * the COPYING file in the top-level directory.
 */

#ifndef ASPEED_LPC_H
#define ASPEED_LPC_H

#include "hw/sysbus.h"

#define TYPE_ASPEED_LPC "aspeed.lpc"
#define ASPEED_LPC(obj) OBJECT_CHECK(AspeedLPCState, (obj), TYPE_ASPEED_LPC)

#define ASPEED_LPC_NR_REGS      (0x260 >> 2)

enum aspeed_lpc_subdevice {
    aspeed_lpc_kcs_1 = 0,
    aspeed_lpc_kcs_2,
    aspeed_lpc_kcs_3,
    aspeed_lpc_kcs_4,
    aspeed_lpc_ibt,
};

#define ASPEED_LPC_NR_SUBDEVS   5

typedef struct AspeedLPCState {
    /* <private> */
    SysBusDevice parent;

    /*< public >*/
    MemoryRegion iomem;
    qemu_irq irq;

    qemu_irq subdevice_irqs[ASPEED_LPC_NR_SUBDEVS];
    uint32_t subdevice_irqs_pending;

    uint32_t regs[ASPEED_LPC_NR_REGS];
    uint32_t hicr7;
} AspeedLPCState;

#endif /* ASPEED_LPC_H */