File: riscv-on-ppc64-gcc15-121689.patch

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From: Michael Tokarev <mjt@tls.msk.ru>
Date: Sat, 13 Sep 2025 09:32:06 +0300
Subject: riscv-on-ppc64: work around gcc-15 bug 121689
Bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121689

See also: LP#2120835
https://lists.gnu.org/archive/html/qemu-devel/2025-08/msg03901.html

Based solely on work by Christian Ehrhardt.

diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
--- a/target/riscv/pmu.c
+++ b/target/riscv/pmu.c
@@ -189,6 +189,9 @@ static int riscv_pmu_incr_ctr_rv64(RISCVCPU *cpu, uint32_t ctr_idx)
  *  env->priv and env->virt_enabled contain old priv and old virt and
  *  new priv and new virt values are passed in as arguments.
  */
+#if defined(__powerpc64__) || defined(__ppc64__)
+__attribute__((optimize("no-gcse")))
+#endif
 static void riscv_pmu_icount_update_priv(CPURISCVState *env,
                                          target_ulong newpriv, bool new_virt)
 {