1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822
|
/*! \file */
/* ************************************************************************
* Copyright (C) 2019-2024 Advanced Micro Devices, Inc. All rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* ************************************************************************ */
#include "testing.hpp"
//
//
//
template <typename T>
void testing_csrgemm_bad_arg(const Arguments& arg)
{
static const size_t safe_size = 1;
T h_alpha = 0.6;
T h_beta = 0.2;
host_dense_vector<rocsparse_int> hcsr_row_ptr_C(safe_size + 1);
hcsr_row_ptr_C[0] = 0;
hcsr_row_ptr_C[1] = 1;
device_dense_vector<rocsparse_int> dcsr_row_ptr_C(hcsr_row_ptr_C);
// Create rocsparse handle
rocsparse_local_handle local_handle;
// Create matrix descriptors
rocsparse_local_mat_descr local_descr_A;
rocsparse_local_mat_descr local_descr_B;
rocsparse_local_mat_descr local_descr_C;
rocsparse_local_mat_descr local_descr_D;
// Create info desciptor
rocsparse_local_mat_info local_info_C;
rocsparse_handle handle = local_handle;
rocsparse_operation trans_A = rocsparse_operation_none;
rocsparse_operation trans_B = rocsparse_operation_none;
rocsparse_int m = safe_size;
rocsparse_int n = safe_size;
rocsparse_int k = safe_size;
rocsparse_mat_info info_C = local_info_C;
size_t* buffer_size = (size_t*)0x4;
void* temp_buffer = (void*)0x4;
// C matrix
const rocsparse_mat_descr descr_C = local_descr_C;
T* csr_val_C = (T*)0x4;
rocsparse_int* csr_row_ptr_C = (rocsparse_int*)dcsr_row_ptr_C;
rocsparse_int* csr_col_ind_C = (rocsparse_int*)0x4;
rocsparse_int* nnz_C = (rocsparse_int*)0x4;
#define PARAMS_BUFFER_SIZE \
handle, trans_A, trans_B, m, n, k, alpha, descr_A, nnz_A, csr_row_ptr_A, csr_col_ind_A, \
descr_B, nnz_B, csr_row_ptr_B, csr_col_ind_B, beta, descr_D, nnz_D, csr_row_ptr_D, \
csr_col_ind_D, info_C, buffer_size
#define PARAMS_NNZ \
handle, trans_A, trans_B, m, n, k, descr_A, nnz_A, csr_row_ptr_A, csr_col_ind_A, descr_B, \
nnz_B, csr_row_ptr_B, csr_col_ind_B, descr_D, nnz_D, csr_row_ptr_D, csr_col_ind_D, \
descr_C, csr_row_ptr_C, nnz_C, info_C, temp_buffer
#define PARAMS \
handle, trans_A, trans_B, m, n, k, alpha, descr_A, nnz_A, csr_val_A, csr_row_ptr_A, \
csr_col_ind_A, descr_B, nnz_B, csr_val_B, csr_row_ptr_B, csr_col_ind_B, beta, descr_D, \
nnz_D, csr_val_D, csr_row_ptr_D, csr_col_ind_D, descr_C, csr_val_C, csr_row_ptr_C, \
csr_col_ind_C, info_C, temp_buffer
// 4 Scenarios need to be tested:
// Scenario 1: alpha == nullptr && beta == nullptr
// Scenario 2: alpha != nullptr && beta == nullptr
// Scenario 3: alpha == nullptr && beta != nullptr
// Scenario 4: alpha != nullptr && beta != nullptr
// ###############################################
// Scenario 1: alpha == nullptr && beta == nullptr
// ###############################################
{
// In this scenario matrices A == B == D == nullptr
static constexpr int nargs_to_exclude_buffer_size = 14;
static constexpr int nargs_to_exclude_nnz = 16;
static constexpr int nargs_to_exclude = 22;
const int args_to_exclude_buffer_size[nargs_to_exclude_buffer_size]
= {6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19};
const int args_to_exclude_nnz[nargs_to_exclude_nnz]
= {6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 22};
const int args_to_exclude[nargs_to_exclude]
= {6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 28};
const T* alpha = (const T*)nullptr;
const T* beta = (const T*)nullptr;
// A matrix
const rocsparse_mat_descr descr_A = (const rocsparse_mat_descr) nullptr;
rocsparse_int nnz_A = 0;
const T* csr_val_A = (const T*)nullptr;
const rocsparse_int* csr_row_ptr_A = (const rocsparse_int*)nullptr;
const rocsparse_int* csr_col_ind_A = (const rocsparse_int*)nullptr;
// B matrix
const rocsparse_mat_descr descr_B = (const rocsparse_mat_descr) nullptr;
rocsparse_int nnz_B = 0;
const T* csr_val_B = (const T*)nullptr;
const rocsparse_int* csr_row_ptr_B = (const rocsparse_int*)nullptr;
const rocsparse_int* csr_col_ind_B = (const rocsparse_int*)nullptr;
// D matrix
const rocsparse_mat_descr descr_D = (const rocsparse_mat_descr) nullptr;
rocsparse_int nnz_D = 0;
const T* csr_val_D = (const T*)nullptr;
const rocsparse_int* csr_row_ptr_D = (const rocsparse_int*)nullptr;
const rocsparse_int* csr_col_ind_D = (const rocsparse_int*)nullptr;
select_bad_arg_analysis(rocsparse_csrgemm_buffer_size<T>,
nargs_to_exclude_buffer_size,
args_to_exclude_buffer_size,
PARAMS_BUFFER_SIZE);
select_bad_arg_analysis(
rocsparse_csrgemm_nnz, nargs_to_exclude_nnz, args_to_exclude_nnz, PARAMS_NNZ);
select_bad_arg_analysis(rocsparse_csrgemm<T>, nargs_to_exclude, args_to_exclude, PARAMS);
}
// ###############################################
// Scenario 2: alpha != nullptr && beta == nullptr
// ###############################################
{
// In this scenario matrices A != B != nullptr and D == nullptr
static constexpr int nargs_to_exclude_buffer_size = 6;
static constexpr int nargs_to_exclude_nnz = 4;
static constexpr int nargs_to_exclude = 6;
const int args_to_exclude_buffer_size[nargs_to_exclude_buffer_size]
= {6, 15, 16, 17, 18, 19};
const int args_to_exclude_nnz[nargs_to_exclude_nnz] = {14, 15, 16, 17};
const int args_to_exclude[nargs_to_exclude] = {17, 18, 19, 20, 21, 22};
const T* alpha = &h_alpha;
const T* beta = (const T*)nullptr;
// A matrix
const rocsparse_mat_descr descr_A = local_descr_A;
rocsparse_int nnz_A = safe_size;
const T* csr_val_A = (const T*)0x4;
const rocsparse_int* csr_row_ptr_A = (const rocsparse_int*)0x4;
const rocsparse_int* csr_col_ind_A = (const rocsparse_int*)0x4;
// B matrix
const rocsparse_mat_descr descr_B = local_descr_B;
rocsparse_int nnz_B = safe_size;
const T* csr_val_B = (const T*)0x4;
const rocsparse_int* csr_row_ptr_B = (const rocsparse_int*)0x4;
const rocsparse_int* csr_col_ind_B = (const rocsparse_int*)0x4;
// D matrix
const rocsparse_mat_descr descr_D = (const rocsparse_mat_descr) nullptr;
rocsparse_int nnz_D = 0;
const T* csr_val_D = (const T*)nullptr;
const rocsparse_int* csr_row_ptr_D = (const rocsparse_int*)nullptr;
const rocsparse_int* csr_col_ind_D = (const rocsparse_int*)nullptr;
select_bad_arg_analysis(rocsparse_csrgemm_buffer_size<T>,
nargs_to_exclude_buffer_size,
args_to_exclude_buffer_size,
PARAMS_BUFFER_SIZE);
select_bad_arg_analysis(
rocsparse_csrgemm_nnz, nargs_to_exclude_nnz, args_to_exclude_nnz, PARAMS_NNZ);
select_bad_arg_analysis(rocsparse_csrgemm<T>, nargs_to_exclude, args_to_exclude, PARAMS);
}
// ###############################################
// Scenario 3: alpha == nullptr && beta != nullptr
// ###############################################
{
// In this scenario matrices A == B == nullptr and D != nullptr
static constexpr int nargs_to_exclude_buffer_size = 11;
static constexpr int nargs_to_exclude_nnz = 9;
static constexpr int nargs_to_exclude = 12;
const int args_to_exclude_buffer_size[nargs_to_exclude_buffer_size]
= {5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
const int args_to_exclude_nnz[nargs_to_exclude_nnz] = {6, 7, 8, 9, 10, 11, 12, 13, 22};
const int args_to_exclude[nargs_to_exclude] = {6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 28};
const T* alpha = (const T*)nullptr;
const T* beta = &h_beta;
temp_buffer = (void*)nullptr;
// A matrix
const rocsparse_mat_descr descr_A = (const rocsparse_mat_descr) nullptr;
rocsparse_int nnz_A = 0;
const T* csr_val_A = (const T*)nullptr;
const rocsparse_int* csr_row_ptr_A = (const rocsparse_int*)nullptr;
const rocsparse_int* csr_col_ind_A = (const rocsparse_int*)nullptr;
// B matrix
const rocsparse_mat_descr descr_B = (const rocsparse_mat_descr) nullptr;
rocsparse_int nnz_B = 0;
const T* csr_val_B = (const T*)nullptr;
const rocsparse_int* csr_row_ptr_B = (const rocsparse_int*)nullptr;
const rocsparse_int* csr_col_ind_B = (const rocsparse_int*)nullptr;
// D matrix
const rocsparse_mat_descr descr_D = local_descr_D;
rocsparse_int nnz_D = safe_size;
const T* csr_val_D = (const T*)0x4;
const rocsparse_int* csr_row_ptr_D = (const rocsparse_int*)0x4;
const rocsparse_int* csr_col_ind_D = (const rocsparse_int*)0x4;
select_bad_arg_analysis(rocsparse_csrgemm_buffer_size<T>,
nargs_to_exclude_buffer_size,
args_to_exclude_buffer_size,
PARAMS_BUFFER_SIZE);
select_bad_arg_analysis(
rocsparse_csrgemm_nnz, nargs_to_exclude_nnz, args_to_exclude_nnz, PARAMS_NNZ);
select_bad_arg_analysis(rocsparse_csrgemm<T>, nargs_to_exclude, args_to_exclude, PARAMS);
temp_buffer = (void*)0x4;
}
// ###############################################
// Scenario 4: alpha != nullptr && beta != nullptr
// ###############################################
{
// In this scenario matrices A != B != D != nullptr
int nargs_to_exclude_buffer_size = 2;
int nargs_to_exclude = 2;
const int args_to_exclude_buffer_size[2] = {6, 15};
const int args_to_exclude[2] = {6, 17};
const T* alpha = &h_alpha;
const T* beta = &h_beta;
// A matrix
const rocsparse_mat_descr descr_A = local_descr_A;
rocsparse_int nnz_A = safe_size;
const T* csr_val_A = (const T*)0x4;
const rocsparse_int* csr_row_ptr_A = (const rocsparse_int*)0x4;
const rocsparse_int* csr_col_ind_A = (const rocsparse_int*)0x4;
// B matrix
const rocsparse_mat_descr descr_B = local_descr_B;
rocsparse_int nnz_B = safe_size;
const T* csr_val_B = (const T*)0x4;
const rocsparse_int* csr_row_ptr_B = (const rocsparse_int*)0x4;
const rocsparse_int* csr_col_ind_B = (const rocsparse_int*)0x4;
// D matrix
const rocsparse_mat_descr descr_D = local_descr_D;
rocsparse_int nnz_D = safe_size;
const T* csr_val_D = (const T*)0x4;
const rocsparse_int* csr_row_ptr_D = (const rocsparse_int*)0x4;
const rocsparse_int* csr_col_ind_D = (const rocsparse_int*)0x4;
select_bad_arg_analysis(rocsparse_csrgemm_buffer_size<T>,
nargs_to_exclude_buffer_size,
args_to_exclude_buffer_size,
PARAMS_BUFFER_SIZE);
bad_arg_analysis(rocsparse_csrgemm_nnz, PARAMS_NNZ);
select_bad_arg_analysis(rocsparse_csrgemm<T>, nargs_to_exclude, args_to_exclude, PARAMS);
}
//
// Not implemented cases.
//
{
const T* alpha = &h_alpha;
const T* beta = &h_beta;
// A matrix
const rocsparse_mat_descr descr_A = local_descr_A;
rocsparse_int nnz_A = safe_size;
const T* csr_val_A = (const T*)0x4;
const rocsparse_int* csr_row_ptr_A = (const rocsparse_int*)0x4;
const rocsparse_int* csr_col_ind_A = (const rocsparse_int*)0x4;
// B matrix
const rocsparse_mat_descr descr_B = local_descr_B;
rocsparse_int nnz_B = safe_size;
const T* csr_val_B = (const T*)0x4;
const rocsparse_int* csr_row_ptr_B = (const rocsparse_int*)0x4;
const rocsparse_int* csr_col_ind_B = (const rocsparse_int*)0x4;
// D matrix
const rocsparse_mat_descr descr_D = local_descr_D;
rocsparse_int nnz_D = safe_size;
const T* csr_val_D = (const T*)0x4;
const rocsparse_int* csr_row_ptr_D = (const rocsparse_int*)0x4;
const rocsparse_int* csr_col_ind_D = (const rocsparse_int*)0x4;
{
rocsparse_operation op = trans_A;
trans_A = rocsparse_operation_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm_buffer_size<T>(PARAMS_BUFFER_SIZE),
rocsparse_status_not_implemented);
trans_A = rocsparse_operation_conjugate_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm_buffer_size<T>(PARAMS_BUFFER_SIZE),
rocsparse_status_not_implemented);
trans_A = op;
op = trans_B;
trans_B = rocsparse_operation_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm_buffer_size<T>(PARAMS_BUFFER_SIZE),
rocsparse_status_not_implemented);
trans_B = rocsparse_operation_conjugate_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm_buffer_size<T>(PARAMS_BUFFER_SIZE),
rocsparse_status_not_implemented);
trans_B = op;
}
{
rocsparse_operation op = trans_A;
trans_A = rocsparse_operation_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm_nnz(PARAMS_NNZ),
rocsparse_status_not_implemented);
trans_A = rocsparse_operation_conjugate_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm_nnz(PARAMS_NNZ),
rocsparse_status_not_implemented);
trans_A = op;
op = trans_B;
trans_B = rocsparse_operation_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm_nnz(PARAMS_NNZ),
rocsparse_status_not_implemented);
trans_B = rocsparse_operation_conjugate_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm_nnz(PARAMS_NNZ),
rocsparse_status_not_implemented);
trans_B = op;
}
{
rocsparse_operation op = trans_A;
trans_A = rocsparse_operation_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm<T>(PARAMS), rocsparse_status_not_implemented);
trans_A = rocsparse_operation_conjugate_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm<T>(PARAMS), rocsparse_status_not_implemented);
trans_A = op;
op = trans_B;
trans_B = rocsparse_operation_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm<T>(PARAMS), rocsparse_status_not_implemented);
trans_B = rocsparse_operation_conjugate_transpose;
EXPECT_ROCSPARSE_STATUS(rocsparse_csrgemm<T>(PARAMS), rocsparse_status_not_implemented);
trans_B = op;
}
}
#undef PARAMS
#undef PARAMS_NNZ
#undef PARAMS_BUFFER_SIZE
}
enum testing_csrgemm_scenario
{
testing_csrgemm_scenario_none,
testing_csrgemm_scenario_alpha,
testing_csrgemm_scenario_beta,
testing_csrgemm_scenario_alpha_and_beta,
};
template <typename T>
void testing_csrgemm(const Arguments& arg)
{
rocsparse_int M = arg.M;
rocsparse_int N = arg.N;
rocsparse_int K = arg.K;
rocsparse_operation transA = arg.transA;
rocsparse_operation transB = arg.transB;
rocsparse_index_base baseA = arg.baseA;
rocsparse_index_base baseB = arg.baseB;
rocsparse_index_base baseC = arg.baseC;
rocsparse_index_base baseD = arg.baseD;
static constexpr bool full_rank = false;
T v_alpha = arg.get_alpha<T>(), v_beta = arg.get_beta<T>();
// Create rocsparse handle
rocsparse_local_handle handle;
// Create matrix descriptor
rocsparse_local_mat_descr descrA;
rocsparse_local_mat_descr descrB;
rocsparse_local_mat_descr descrC;
rocsparse_local_mat_descr descrD;
// Set matrix index base
CHECK_ROCSPARSE_ERROR(rocsparse_set_mat_index_base(descrA, baseA));
CHECK_ROCSPARSE_ERROR(rocsparse_set_mat_index_base(descrB, baseB));
CHECK_ROCSPARSE_ERROR(rocsparse_set_mat_index_base(descrC, baseC));
CHECK_ROCSPARSE_ERROR(rocsparse_set_mat_index_base(descrD, baseD));
// Create matrix info for C
rocsparse_local_mat_info info;
void* dbuffer = nullptr;
#define PARAMS_BUFFER_SIZE(alpha, beta, A, B, C, D, out_buffer_size) \
handle, transA, transB, A.m, C.n, A.n, alpha, descrA, A.nnz, A.ptr, A.ind, descrB, B.nnz, \
B.ptr, B.ind, beta, descrD, D.nnz, D.ptr, D.ind, info, &out_buffer_size
#define PARAMS_NNZ(A, B, C, D, out_nnz) \
handle, transA, transB, A.m, C.n, A.n, descrA, A.nnz, A.ptr, A.ind, descrB, B.nnz, B.ptr, \
B.ind, descrD, D.nnz, D.ptr, D.ind, descrC, C.ptr, out_nnz, info, dbuffer
#define PARAMS(alpha, beta, A, B, C, D) \
handle, transA, transB, A.m, C.n, A.n, alpha, descrA, A.nnz, A.val, A.ptr, A.ind, descrB, \
B.nnz, B.val, B.ptr, B.ind, beta, descrD, D.nnz, D.val, D.ptr, D.ind, descrC, C.val, \
C.ptr, C.ind, info, dbuffer
// 4 Scenarios need to be tested:
// Scenario 1: alpha == nullptr && beta == nullptr
// Scenario 2: alpha != nullptr && beta == nullptr
// Scenario 3: alpha == nullptr && beta != nullptr
// Scenario 4: alpha != nullptr && beta != nullptr
// alpha == -99 means test for alpha == nullptr
// beta == -99 means test for beta == nullptr
testing_csrgemm_scenario scenario = testing_csrgemm_scenario_none;
if(v_alpha != static_cast<T>(-99) && v_beta == static_cast<T>(-99))
{
scenario = testing_csrgemm_scenario_alpha;
}
else if(v_alpha == static_cast<T>(-99) && v_beta != static_cast<T>(-99))
{
scenario = testing_csrgemm_scenario_beta;
}
else if(v_alpha != static_cast<T>(-99) && v_beta != static_cast<T>(-99))
{
scenario = testing_csrgemm_scenario_alpha_and_beta;
}
host_dense_vector<T> h_alpha(0), h_beta(0);
switch(scenario)
{
case testing_csrgemm_scenario_none:
{
break;
}
case testing_csrgemm_scenario_alpha:
{
h_alpha.resize(1);
*h_alpha = v_alpha;
break;
}
case testing_csrgemm_scenario_beta:
{
h_beta.resize(1);
*h_beta = v_beta;
break;
}
case testing_csrgemm_scenario_alpha_and_beta:
{
h_alpha.resize(1);
*h_alpha = v_alpha;
h_beta.resize(1);
*h_beta = v_beta;
break;
}
}
//
// Argument sanity check before allocating invalid memory
//
if((M <= 0 || N <= 0 || K <= 0) || scenario == testing_csrgemm_scenario_none)
{
device_csr_matrix<T> d_A, d_B, d_C, d_D;
d_A.define(M, K, 0, baseA);
d_B.define(K, N, 0, baseB);
d_C.define(M, N, 0, baseC);
d_D.define(M, N, 0, baseD);
CHECK_ROCSPARSE_ERROR(rocsparse_set_pointer_mode(handle, rocsparse_pointer_mode_host));
size_t out_buffer_size;
rocsparse_int out_nnz;
rocsparse_status status_1 = rocsparse_csrgemm_buffer_size<T>(
PARAMS_BUFFER_SIZE(h_alpha, h_beta, d_A, d_B, d_C, d_D, out_buffer_size));
rocsparse_status status_2 = rocsparse_csrgemm_nnz(PARAMS_NNZ(d_A, d_B, d_C, d_D, &out_nnz));
rocsparse_status status_3
= rocsparse_csrgemm<T>(PARAMS(h_alpha, h_beta, d_A, d_B, d_C, d_D));
EXPECT_ROCSPARSE_STATUS(status_1,
(M < 0 || N < 0 || K < 0) ? rocsparse_status_invalid_size
: scenario == testing_csrgemm_scenario_none
? rocsparse_status_invalid_pointer
: rocsparse_status_success);
EXPECT_ROCSPARSE_STATUS(status_2,
(M < 0 || N < 0 || K < 0) ? rocsparse_status_invalid_size
: scenario == testing_csrgemm_scenario_none
? rocsparse_status_invalid_pointer
: rocsparse_status_success);
EXPECT_ROCSPARSE_STATUS(status_3,
(M < 0 || N < 0 || K < 0) ? rocsparse_status_invalid_size
: scenario == testing_csrgemm_scenario_none
? rocsparse_status_invalid_pointer
: rocsparse_status_success);
return;
}
//
// Declare host objects.
//
host_csr_matrix<T> h_A, h_B, h_C, h_D;
//
// Initialize matrices.
//
{
rocsparse_matrix_factory<T> matrix_factory(arg, arg.timing ? false : true, full_rank);
matrix_factory.init_csr(h_A, M, K, baseA);
switch(scenario)
{
case testing_csrgemm_scenario_none:
{
break;
}
case testing_csrgemm_scenario_alpha:
{
rocsparse_matrix_factory_random<T> rf(full_rank);
{
h_B.base = baseB;
h_B.m = K;
h_B.n = N;
rf.init_csr(h_B.ptr,
h_B.ind,
h_B.val,
h_B.m,
h_B.n,
h_B.nnz,
h_B.base,
rocsparse_matrix_type_general,
rocsparse_fill_mode_lower,
rocsparse_storage_mode_sorted);
}
break;
}
case testing_csrgemm_scenario_beta:
{
matrix_factory.init_csr(h_D, M, N, baseD);
break;
}
case testing_csrgemm_scenario_alpha_and_beta:
{
rocsparse_matrix_factory_random<T> rf(full_rank);
{
h_B.base = baseB;
h_B.m = K;
h_B.n = N;
rf.init_csr(h_B.ptr,
h_B.ind,
h_B.val,
h_B.m,
h_B.n,
h_B.nnz,
h_B.base,
rocsparse_matrix_type_general,
rocsparse_fill_mode_lower,
rocsparse_storage_mode_sorted);
}
{
h_D.base = baseD;
h_D.m = M;
h_D.n = N;
rf.init_csr(h_D.ptr,
h_D.ind,
h_D.val,
h_D.m,
h_D.n,
h_D.nnz,
h_D.base,
rocsparse_matrix_type_general,
rocsparse_fill_mode_lower,
rocsparse_storage_mode_sorted);
}
break;
}
}
h_C.define(M, N, 0, baseC);
}
//
// Declare device objects.
//
device_csr_matrix<T> d_A(h_A), d_B(h_B), d_C(h_C), d_D(h_D);
device_dense_vector<T> d_alpha(h_alpha), d_beta(h_beta);
// Obtain required buffer size
size_t out_buffer_size;
CHECK_ROCSPARSE_ERROR(rocsparse_set_pointer_mode(handle, rocsparse_pointer_mode_host));
CHECK_ROCSPARSE_ERROR(rocsparse_csrgemm_buffer_size<T>(
PARAMS_BUFFER_SIZE(h_alpha, h_beta, d_A, d_B, d_C, d_D, out_buffer_size)));
CHECK_HIP_ERROR(rocsparse_hipMalloc(&dbuffer, out_buffer_size));
if(arg.unit_check)
{
//
// Host calculation.
//
{
rocsparse_int out_nnz;
host_csrgemm_nnz<T, rocsparse_int, rocsparse_int>(h_A.m,
h_C.n,
h_A.n,
h_alpha,
h_A.ptr,
h_A.ind,
h_B.ptr,
h_B.ind,
h_beta,
h_D.ptr,
h_D.ind,
h_C.ptr,
&out_nnz,
h_A.base,
h_B.base,
h_C.base,
h_D.base);
h_C.define(h_C.m, h_C.n, out_nnz, h_C.base);
host_csrgemm<T, rocsparse_int, rocsparse_int>(h_A.m,
h_C.n,
h_A.n,
h_alpha,
h_A.ptr,
h_A.ind,
h_A.val,
h_B.ptr,
h_B.ind,
h_B.val,
h_beta,
h_D.ptr,
h_D.ind,
h_D.val,
h_C.ptr,
h_C.ind,
h_C.val,
h_A.base,
h_B.base,
h_C.base,
h_D.base);
}
{
//
// GPU with pointer mode host
//
host_scalar<rocsparse_int> h_out_nnz;
CHECK_ROCSPARSE_ERROR(rocsparse_set_pointer_mode(handle, rocsparse_pointer_mode_host));
CHECK_ROCSPARSE_ERROR(rocsparse_csrgemm_nnz(PARAMS_NNZ(d_A, d_B, d_C, d_D, h_out_nnz)));
d_C.define(d_C.m, d_C.n, *h_out_nnz, d_C.base);
CHECK_ROCSPARSE_ERROR(
rocsparse_csrgemm<T>(PARAMS(h_alpha, h_beta, d_A, d_B, d_C, d_D)));
if(ROCSPARSE_REPRODUCIBILITY)
{
rocsparse_reproducibility::save("d_C pointer mode host", d_C);
}
h_C.near_check(d_C);
}
{
//
// GPU with pointer mode device
//
device_scalar<rocsparse_int> d_out_nnz;
CHECK_ROCSPARSE_ERROR(
rocsparse_set_pointer_mode(handle, rocsparse_pointer_mode_device));
CHECK_ROCSPARSE_ERROR(rocsparse_csrgemm_nnz(PARAMS_NNZ(d_A, d_B, d_C, d_D, d_out_nnz)));
host_scalar<rocsparse_int> h_out_nnz(d_out_nnz);
d_C.define(d_C.m, d_C.n, 0, d_C.base);
d_C.define(d_C.m, d_C.n, *h_out_nnz, d_C.base);
CHECK_ROCSPARSE_ERROR(
rocsparse_csrgemm<T>(PARAMS(d_alpha, d_beta, d_A, d_B, d_C, d_D)));
if(ROCSPARSE_REPRODUCIBILITY)
{
rocsparse_reproducibility::save("d_C pointer mode device", d_C);
}
h_C.near_check(d_C);
}
}
if(arg.timing)
{
#define ROCSPARSE_TIMER_IN(decl_) double decl_ = get_time_us();
#define ROCSPARSE_TIMER_OUT(decl_) decl_ = (get_time_us() - decl_) / number_hot_calls
int number_cold_calls = 2;
int number_hot_calls = arg.iters;
CHECK_ROCSPARSE_ERROR(rocsparse_set_pointer_mode(handle, rocsparse_pointer_mode_host));
//
// WARM UP
//
rocsparse_int out_nnz;
CHECK_ROCSPARSE_ERROR(rocsparse_csrgemm_nnz(PARAMS_NNZ(d_A, d_B, d_C, d_D, &out_nnz)));
d_C.define(d_C.m, d_C.n, out_nnz, d_C.base);
for(int iter = 0; iter < number_cold_calls; ++iter)
{
CHECK_ROCSPARSE_ERROR(
rocsparse_csrgemm<T>(PARAMS(h_alpha, h_beta, d_A, d_B, d_C, d_D)));
}
ROCSPARSE_TIMER_IN(gpu_solve_time_used);
{
for(int iter = 0; iter < number_hot_calls; ++iter)
{
CHECK_ROCSPARSE_ERROR(
rocsparse_csrgemm<T>(PARAMS(h_alpha, h_beta, d_A, d_B, d_C, d_D)));
}
}
ROCSPARSE_TIMER_OUT(gpu_solve_time_used);
hipDeviceSynchronize();
#undef PARAMS
#undef PARAMS_NNZ
#undef PARAMS_BUFFER_SIZE
double gflop_count = csrgemm_gflop_count<T, rocsparse_int, rocsparse_int>(
M, h_alpha, h_A.ptr, h_A.ind, h_B.ptr, h_beta, h_D.ptr, h_A.base);
double gbyte_count = csrgemm_gbyte_count<T, rocsparse_int, rocsparse_int>(
M, N, K, d_A.nnz, d_B.nnz, d_C.nnz, d_D.nnz, h_alpha, h_beta);
double gpu_gflops = get_gpu_gflops(gpu_solve_time_used, gflop_count);
double gpu_gbyte = get_gpu_gbyte(gpu_solve_time_used, gbyte_count);
char alpha[32], beta[32];
sprintf(alpha, "null");
sprintf(beta, "null");
if(h_alpha.data() != nullptr)
{
std::stringstream ss;
ss << *h_alpha;
sprintf(alpha, "%s", ss.str().c_str());
}
if(h_beta.data() != nullptr)
{
std::stringstream ss;
ss << *h_beta;
sprintf(beta, "%s", ss.str().c_str());
}
display_timing_info(display_key_t::trans_A,
rocsparse_operation2string(transA),
display_key_t::trans_B,
rocsparse_operation2string(transB),
display_key_t::M,
M,
display_key_t::N,
N,
display_key_t::K,
K,
display_key_t::nnz_A,
d_A.nnz,
display_key_t::nnz_B,
d_B.nnz,
display_key_t::nnz_C,
d_C.nnz,
display_key_t::nnz_D,
d_D.nnz,
display_key_t::alpha,
alpha,
display_key_t::beta,
beta,
display_key_t::gflops,
gpu_gflops,
display_key_t::bandwidth,
gpu_gbyte,
display_key_t::time_ms,
get_gpu_time_msec(gpu_solve_time_used));
}
// Free buffer
CHECK_HIP_ERROR(rocsparse_hipFree(dbuffer));
}
#define INSTANTIATE(TYPE) \
template void testing_csrgemm_bad_arg<TYPE>(const Arguments& arg); \
template void testing_csrgemm<TYPE>(const Arguments& arg)
INSTANTIATE(float);
INSTANTIATE(double);
INSTANTIATE(rocsparse_float_complex);
INSTANTIATE(rocsparse_double_complex);
void testing_csrgemm_extra(const Arguments& arg) {}
|