File: simd-wide-sum.rs

package info (click to toggle)
rustc-web 1.78.0%2Bdfsg1-2~deb11u3
  • links: PTS, VCS
  • area: main
  • in suites: bullseye
  • size: 1,245,360 kB
  • sloc: xml: 147,985; javascript: 18,022; sh: 11,083; python: 10,265; ansic: 6,172; cpp: 5,023; asm: 4,390; makefile: 4,269
file content (58 lines) | stat: -rw-r--r-- 1,818 bytes parent folder | download | duplicates (2)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
//@ revisions: llvm mir-opt3
//@ compile-flags: -C opt-level=3 -Z merge-functions=disabled --edition=2021
//@ only-x86_64
//@ [mir-opt3]compile-flags: -Zmir-opt-level=3
//@ [mir-opt3]build-pass

// mir-opt3 is a regression test for https://github.com/rust-lang/rust/issues/98016

#![crate_type = "lib"]
#![feature(portable_simd)]

use std::simd::prelude::*;
const N: usize = 16;

#[no_mangle]
// CHECK-LABEL: @wider_reduce_simd
pub fn wider_reduce_simd(x: Simd<u8, N>) -> u16 {
    // CHECK: zext <16 x i8>
    // CHECK-SAME: to <16 x i16>
    // CHECK: call i16 @llvm.vector.reduce.add.v16i16(<16 x i16>
    let x: Simd<u16, N> = x.cast();
    x.reduce_sum()
}

#[no_mangle]
// CHECK-LABEL: @wider_reduce_loop
pub fn wider_reduce_loop(x: Simd<u8, N>) -> u16 {
    // CHECK: zext <16 x i8>
    // CHECK-SAME: to <16 x i16>
    // CHECK: call i16 @llvm.vector.reduce.add.v16i16(<16 x i16>
    let mut sum = 0_u16;
    for i in 0..N {
        sum += u16::from(x[i]);
    }
    sum
}

#[no_mangle]
// CHECK-LABEL: @wider_reduce_iter
pub fn wider_reduce_iter(x: Simd<u8, N>) -> u16 {
    // CHECK: zext <16 x i8>
    // CHECK-SAME: to <16 x i16>
    // CHECK: call i16 @llvm.vector.reduce.add.v16i16(<16 x i16>
    x.as_array().iter().copied().map(u16::from).sum()
}

// This iterator one is the most interesting, as it's the one
// which used to not auto-vectorize due to a suboptimality in the
// `<array::IntoIter as Iterator>::fold` implementation.

#[no_mangle]
// CHECK-LABEL: @wider_reduce_into_iter
pub fn wider_reduce_into_iter(x: Simd<u8, N>) -> u16 {
    // FIXME: It would be nice if this was exactly the same as the above tests,
    // but at the time of writing this comment, that didn't happen on LLVM main.
    // CHECK: call i16 @llvm.vector.reduce.add
    x.to_array().into_iter().map(u16::from).sum()
}