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default Order dec
$include <prelude.sail>
// We have a few variations of the same bitfield:
bitfield B : bits(32) = {
Field0: (31..16 @ 7..0),
Field1: 15..8
}
bitfield B2 : bits(32) = {
Field0: 31..16 @ 7..0,
Field1: 15..8
}
bitfield B3 : bits(32) = {
Field0: 31..16 @ 7..0,
Field1: 15..8,
}
bitfield B4 : bits(32) = {
Field0: 31..16 @ 7..4 @ 3..0,
Field1: 15..8,
}
bitfield B5 : bits(32) = {
Field0: (31..16) @ 7..4 @ 3..0,
Field1: 15..8,
}
bitfield B6 : bits(32) = {
Field0: ((31..16) @ 7..4) @ 3..0,
Field1: 15..8,
}
register R : B
function main() -> unit = {
R[Field1] = 0x00;
R[Field0] = 0x4711FF;
assert(R[Field1] == 0x00);
assert(R[Field0] == 0x4711FF);
print_bits("R.bits=", R.bits);
assert(R.bits == 0x471100FF);
R = [R with Field0 = 0xFF0077];
assert(R[Field1] == 0x00);
assert(R[Field0] == 0xFF0077);
print_bits("R.bits=", R.bits);
assert(R.bits == 0xFF000077);
R = [R with Field1 = 0x47, Field0 = 0x000011];
assert(R[Field1] == 0x47);
assert(R[Field0] == 0x000011);
print_bits("R.bits=", R.bits);
assert(R.bits == 0x00004711)
}
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