File: inst_bit.cc

package info (click to toggle)
sdcc 3.8.0%2Bdfsg-2
  • links: PTS, VCS
  • area: main
  • in suites: buster
  • size: 99,212 kB
  • sloc: ansic: 918,594; cpp: 69,526; makefile: 56,790; sh: 29,616; asm: 12,364; perl: 12,136; yacc: 7,179; lisp: 1,672; python: 812; lex: 773; awk: 495; sed: 89
file content (140 lines) | stat: -rw-r--r-- 2,362 bytes parent folder | download
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
/*
 * Simulator of microcontrollers (tlcs.src/inst_bit.cc)
 *
 * Copyright (C) 2016,16 Drotos Daniel, Talker Bt.
 * 
 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
 *
 */

/* This file is part of microcontroller simulator: ucsim.

UCSIM is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

UCSIM is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with UCSIM; see the file COPYING.  If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
/*@1@*/

/* $Id:$ */

#include "tlcscl.h"


// TSET 8-bit
u8_t
cl_tlcs::op_tset(u8_t val, u8_t bitnr)
{
  reg.raf.f&= ~(FLAG_Z|FLAG_N);
  reg.raf.f|= FLAG_H;
  
  bitnr&= 0x07;
  if ((val & (1 << bitnr)) == 0)
    reg.raf.f|= FLAG_Z;
  val|= (1 << bitnr);
  return val;
}


// TSET mem
u8_t
cl_tlcs::inst_tset(cl_memory_cell *cell, u8_t bitnr)
{
  u8_t v= cell->read();
  vc.rd++;
  v= op_tset(v, bitnr);
  cell->write(v);
  vc.wr++;
  return v;
}


// BIT 8-bit
u8_t
cl_tlcs::op_bit(u8_t val, u8_t bitnr)
{
  reg.raf.f&= ~(FLAG_Z|FLAG_N);
  reg.raf.f|= FLAG_H;

  bitnr&= 7;

  if ((val & (1 << bitnr)) == 0)
    reg.raf.f|= FLAG_Z;

  return val;
}


// BIT mem
u8_t
cl_tlcs::inst_bit(cl_memory_cell *cell, u8_t bitnr)
{
  u8_t v= cell->read();
  vc.rd++;
  v= op_bit(v, bitnr);
  cell->write(v);
  vc.wr++;
  return v;
}


// RES 8-bit
u8_t
cl_tlcs::op_res(u8_t val, u8_t bitnr)
{
  bitnr&= 7;

  val&= ~(1 << bitnr);

  return val;
}


// RES mem
u8_t
cl_tlcs::inst_res(cl_memory_cell *cell, u8_t bitnr)
{
  u8_t v= cell->read();
  vc.rd++;
  v= op_res(v, bitnr);
  cell->write(v);
  vc.wr++;
  return v;
}


// SET 8-bit
u8_t
cl_tlcs::op_set(u8_t val, u8_t bitnr)
{
  bitnr&= 7;

  val|= (1 << bitnr);

  return val;
}


// SET mem
u8_t
cl_tlcs::inst_set(cl_memory_cell *cell, u8_t bitnr)
{
  u8_t v= cell->read();
  vc.rd++;
  v= op_set(v, bitnr);
  cell->write(v);
  vc.wr++;
  return v;
}


/* End of tlcs.src/inst_bit.cc */