1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107
|
//===- SPIRVBasicBlock.cpp - SPIR-V Basic Block -----------------*- C++ -*-===//
//
// The LLVM/SPIRV Translator
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
// Copyright (c) 2014 Advanced Micro Devices, Inc. All rights reserved.
//
// Permission is hereby granted, free of charge, to any person obtaining a
// copy of this software and associated documentation files (the "Software"),
// to deal with the Software without restriction, including without limitation
// the rights to use, copy, modify, merge, publish, distribute, sublicense,
// and/or sell copies of the Software, and to permit persons to whom the
// Software is furnished to do so, subject to the following conditions:
//
// Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimers.
// Redistributions in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimers in the documentation
// and/or other materials provided with the distribution.
// Neither the names of Advanced Micro Devices, Inc., nor the names of its
// contributors may be used to endorse or promote products derived from this
// Software without specific prior written permission.
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH
// THE SOFTWARE.
//
//===----------------------------------------------------------------------===//
/// \file
///
/// This file implements SPIRV basic block.
///
//===----------------------------------------------------------------------===//
#include "SPIRVBasicBlock.h"
#include "SPIRVEntry.h"
#include "SPIRVFunction.h"
#include "SPIRVInstruction.h"
#include "SPIRVStream.h"
#include "SPIRVValue.h"
#include <iostream>
using namespace SPIRV;
SPIRVBasicBlock::SPIRVBasicBlock(SPIRVId TheId, SPIRVFunction *Func)
: SPIRVValue(Func->getModule(), 2, OpLabel, TheId), ParentF(Func) {
setAttr();
validate();
}
SPIRVDecoder SPIRVBasicBlock::getDecoder(std::istream &IS) {
return SPIRVDecoder(IS, *this);
}
/// Assume I contains valid Id.
SPIRVInstruction *
SPIRVBasicBlock::addInstruction(SPIRVInstruction *I,
const SPIRVInstruction *InsertBefore) {
assert(I && "Invalid instruction");
Module->add(I);
I->setParent(this);
if (InsertBefore) {
auto Pos = find(InsertBefore);
// If insertion of a new instruction before the one passed to the function
// is illegal, insertion before the returned instruction is guaranteed
// to retain correct instruction order in a block
if (Pos != InstVec.begin() && (isa<OpLoopMerge>(*std::prev(Pos)) ||
isa<OpLoopControlINTEL>(*std::prev(Pos))))
--Pos;
InstVec.insert(Pos, I);
} else
InstVec.push_back(I);
return I;
}
void SPIRVBasicBlock::encodeChildren(spv_ostream &O) const {
O << SPIRVNL();
for (size_t I = 0, E = InstVec.size(); I != E; ++I)
O << *InstVec[I];
}
_SPIRV_IMP_ENCDEC1(SPIRVBasicBlock, Id)
SPIRVInstruction *SPIRVBasicBlock::getVariableInsertionPoint() const {
auto IP =
std::find_if(InstVec.begin(), InstVec.end(), [](SPIRVInstruction *Inst) {
return !(isa<OpVariable>(Inst) || isa<OpLine>(Inst) ||
isa<OpNoLine>(Inst) ||
// Note: OpVariable and OpPhi instructions do not belong to the
// same block in a valid SPIR-V module.
isa<OpPhi>(Inst));
});
if (IP == InstVec.end())
return nullptr;
return *IP;
}
void SPIRVBasicBlock::setScope(SPIRVEntry *Scope) {
assert(Scope && Scope->getOpCode() == OpFunction && "Invalid scope");
setParent(static_cast<SPIRVFunction *>(Scope));
}
|