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|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64-unknown-unknown -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s
---
name: shl_cimm_32
legalized: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $w0
; CHECK-LABEL: name: shl_cimm_32
; CHECK: liveins: $w0
; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; CHECK: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 8
; CHECK: [[SHL:%[0-9]+]]:gpr(s32) = G_SHL [[COPY]], [[C]](s32)
; CHECK: $w0 = COPY [[SHL]](s32)
; CHECK: RET_ReallyLR implicit $w0
%0:_(s32) = COPY $w0
%1:_(s32) = G_CONSTANT i32 8
%2:_(s32) = G_SHL %0, %1(s32)
$w0 = COPY %2(s32)
RET_ReallyLR implicit $w0
...
---
name: shl_cimm_64
legalized: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $x0
; CHECK-LABEL: name: shl_cimm_64
; CHECK: liveins: $x0
; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0
; CHECK: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8
; CHECK: [[SHL:%[0-9]+]]:gpr(s64) = G_SHL [[COPY]], [[C]](s64)
; CHECK: $x0 = COPY [[SHL]](s64)
; CHECK: RET_ReallyLR implicit $x0
%0:_(s64) = COPY $x0
%1:_(s64) = G_CONSTANT i64 8
%2:_(s64) = G_SHL %0, %1(s64)
$x0 = COPY %2(s64)
RET_ReallyLR implicit $x0
...
---
name: lshr_cimm_32
legalized: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $w0
; CHECK-LABEL: name: lshr_cimm_32
; CHECK: liveins: $w0
; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; CHECK: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8
; CHECK: [[LSHR:%[0-9]+]]:gpr(s32) = G_LSHR [[COPY]], [[C]](s64)
; CHECK: $w0 = COPY [[LSHR]](s32)
; CHECK: RET_ReallyLR implicit $w0
%0:_(s32) = COPY $w0
%3:_(s64) = G_CONSTANT i64 8
%2:_(s32) = G_LSHR %0, %3(s64)
$w0 = COPY %2(s32)
RET_ReallyLR implicit $w0
...
---
name: lshr_cimm_64
legalized: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $x0
; CHECK-LABEL: name: lshr_cimm_64
; CHECK: liveins: $x0
; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0
; CHECK: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8
; CHECK: [[LSHR:%[0-9]+]]:gpr(s64) = G_LSHR [[COPY]], [[C]](s64)
; CHECK: $x0 = COPY [[LSHR]](s64)
; CHECK: RET_ReallyLR implicit $x0
%0:_(s64) = COPY $x0
%1:_(s64) = G_CONSTANT i64 8
%2:_(s64) = G_LSHR %0, %1(s64)
$x0 = COPY %2(s64)
RET_ReallyLR implicit $x0
...
---
name: ashr_cimm_32
legalized: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $w0
; CHECK-LABEL: name: ashr_cimm_32
; CHECK: liveins: $w0
; CHECK: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; CHECK: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8
; CHECK: [[ASHR:%[0-9]+]]:gpr(s32) = G_ASHR [[COPY]], [[C]](s64)
; CHECK: $w0 = COPY [[ASHR]](s32)
; CHECK: RET_ReallyLR implicit $w0
%0:_(s32) = COPY $w0
%3:_(s64) = G_CONSTANT i64 8
%2:_(s32) = G_ASHR %0, %3(s64)
$w0 = COPY %2(s32)
RET_ReallyLR implicit $w0
...
---
name: ashr_cimm_64
legalized: true
tracksRegLiveness: true
body: |
bb.1:
liveins: $x0
; CHECK-LABEL: name: ashr_cimm_64
; CHECK: liveins: $x0
; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0
; CHECK: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8
; CHECK: [[ASHR:%[0-9]+]]:gpr(s64) = G_ASHR [[COPY]], [[C]](s64)
; CHECK: $x0 = COPY [[ASHR]](s64)
; CHECK: RET_ReallyLR implicit $x0
%0:_(s64) = COPY $x0
%1:_(s64) = G_CONSTANT i64 8
%2:_(s64) = G_ASHR %0, %1(s64)
$x0 = COPY %2(s64)
RET_ReallyLR implicit $x0
...
|
