File: aarch64-insert-subvector-undef.ll

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (21 lines) | stat: -rw-r--r-- 776 bytes parent folder | download | duplicates (14) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
 
; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s

; Check that this does not ICE.

@d = common dso_local local_unnamed_addr global <4 x i16> zeroinitializer, align 8

define <8 x i16> @c(i32 %e) {
entry:
  %0 = load <4 x i16>, ptr @d, align 8
  %vminv = tail call i32 @llvm.aarch64.neon.uminv.i32.v4i16(<4 x i16> %0)
  %1 = trunc i32 %vminv to i16
  %vecinit3 = insertelement <4 x i16> <i16 undef, i16 undef, i16 0, i16 0>, i16 %1, i32 1
  %call = tail call <8 x i16> @c(i32 0) #3
  %vgetq_lane = extractelement <8 x i16> %call, i32 0
  %vset_lane = insertelement <4 x i16> %vecinit3, i16 %vgetq_lane, i32 0
  %call4 = tail call i32 @k(<4 x i16> %vset_lane) #3
  ret <8 x i16> undef
}

declare i32 @llvm.aarch64.neon.uminv.i32.v4i16(<4 x i16>)
declare i32 @k(...)