File: arm64-vcombine.ll

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (17 lines) | stat: -rw-r--r-- 746 bytes parent folder | download | duplicates (14) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
 
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s

; LowerCONCAT_VECTORS() was reversing the order of two parts.
; rdar://11558157
; rdar://11559553
define <16 x i8> @test(<16 x i8> %q0, <16 x i8> %q1, ptr nocapture %dest) nounwind {
entry:
; CHECK-LABEL: test:
; CHECK: mov.d v0[1], v1[0]
  %0 = bitcast <16 x i8> %q0 to <2 x i64>
  %shuffle.i = shufflevector <2 x i64> %0, <2 x i64> undef, <1 x i32> zeroinitializer
  %1 = bitcast <16 x i8> %q1 to <2 x i64>
  %shuffle.i4 = shufflevector <2 x i64> %1, <2 x i64> undef, <1 x i32> zeroinitializer
  %shuffle.i3 = shufflevector <1 x i64> %shuffle.i, <1 x i64> %shuffle.i4, <2 x i32> <i32 0, i32 1>
  %2 = bitcast <2 x i64> %shuffle.i3 to <16 x i8>
  ret <16 x i8> %2
}