File: postlegalizercombiner-load-and-mask.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs -o - %s | FileCheck %s

# Post-legalizer should not generate illegal extending loads
---
name: zextload_from_load_and_mask
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1
    ; CHECK-LABEL: name: zextload_from_load_and_mask
    ; CHECK: liveins: $vgpr0_vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p1) :: (load (s64), addrspace 1)
    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[LOAD]], [[C]]
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[AND]](s64)
    %0:_(p1) = COPY $vgpr0_vgpr1
    %1:_(s64) = G_CONSTANT i64 255
    %2:_(s64) = G_LOAD %0 :: (load (s64), align 8, addrspace 1)
    %3:_(s64) = G_AND %2, %1
    $vgpr0_vgpr1 = COPY %3
...