File: alloc-all-regs-reserved-in-class.mir

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (18 lines) | stat: -rw-r--r-- 650 bytes parent folder | download | duplicates (15) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
 
# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=greedy -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s

# Check that there isn't an assert if we try to allocate a virtual register from
# a class where all registers are reserved. All AGPRs are reserved on subtargets
# that do not have them.

# CHECK-NOT: ran out of registers during register allocation
# CHECK: LLVM ERROR: no registers from class available to allocate
# CHECK-NOT: ran out of registers during register allocation

---
name: use_agpr
tracksRegLiveness: true
body:             |
  bb.0:
    %0:agpr_32 = IMPLICIT_DEF
    S_ENDPGM 0, implicit %0
...