File: missing-implicit-operand.mir

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (38 lines) | stat: -rw-r--r-- 766 bytes parent folder | download | duplicates (9)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser reports an error when an instruction
# is missing one of its implicit register operands.

--- |

  define i32 @foo(i32* %p) {
  entry:
    %a = load i32, i32* %p
    %0 = icmp sle i32 %a, 10
    br i1 %0, label %less, label %exit

  less:
    ret i32 0

  exit:
    ret i32 %a
  }


...
---
name:            foo
body: |
  bb.0.entry:
    successors: %bb.1.less, %bb.2.exit

    $eax = MOV32rm $rdi, 1, _, 0, _
    CMP32ri8 $eax, 10, implicit-def $eflags
  ; CHECK: [[@LINE+1]]:25: missing implicit register operand 'implicit $eflags'
    JCC_1 %bb.2.exit, 15

  bb.1.less:
    $eax = MOV32r0 implicit-def $eflags

  bb.2.exit:
    RET64 $eax
...