File: register-operand-class-invalid1.mir

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (14 lines) | stat: -rw-r--r-- 395 bytes parent folder | download | duplicates (24) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
 
# RUN: not llc -o /dev/null %s -march=x86-64 -run-pass none 2>&1 | FileCheck %s
# This test ensures that an error is reported for specifying the register class
# of a physical register.
--- |
  define void @t() { ret void }
...
---
name: t
body: |
  bb.0:
    %0 : gr32 = COPY $rdx
    ; CHECK: [[@LINE+1]]:24: conflicting register classes, previously: GR32
    NOOP implicit %0 : gr32_abcd
...