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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
---
name: load1_s8_to_load1_s32
alignment: 4
tracksRegLiveness: true
body: |
bb.0:
liveins: $a0
; MIPS32-LABEL: name: load1_s8_to_load1_s32
; MIPS32: liveins: $a0
; MIPS32-NEXT: {{ $}}
; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s8))
; MIPS32-NEXT: $v0 = COPY [[LOAD]](s32)
; MIPS32-NEXT: RetRA implicit $v0
%0:_(p0) = COPY $a0
%2:_(s32) = G_LOAD %0(p0) :: (load (s8))
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: load2_s16_to_load2_s32
alignment: 4
tracksRegLiveness: true
body: |
bb.0:
liveins: $a0
; MIPS32-LABEL: name: load2_s16_to_load2_s32
; MIPS32: liveins: $a0
; MIPS32-NEXT: {{ $}}
; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s16))
; MIPS32-NEXT: $v0 = COPY [[LOAD]](s32)
; MIPS32-NEXT: RetRA implicit $v0
%0:_(p0) = COPY $a0
%2:_(s32) = G_LOAD %0(p0) :: (load (s16))
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: load_store_i1
alignment: 4
tracksRegLiveness: true
body: |
bb.0:
liveins: $a0, $a1
; MIPS32-LABEL: name: load_store_i1
; MIPS32: liveins: $a0, $a1
; MIPS32-NEXT: {{ $}}
; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load (s8))
; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[LOAD]], [[C]]
; MIPS32-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[AND]], [[C]]
; MIPS32-NEXT: G_STORE [[AND1]](s32), [[COPY]](p0) :: (store (s8))
; MIPS32-NEXT: RetRA
%0:_(p0) = COPY $a0
%1:_(p0) = COPY $a1
%2:_(s1) = G_LOAD %1(p0) :: (load (s1))
G_STORE %2(s1), %0(p0) :: (store (s1))
RetRA
...
---
name: load_store_i8
alignment: 4
tracksRegLiveness: true
body: |
bb.0:
liveins: $a0, $a1
; MIPS32-LABEL: name: load_store_i8
; MIPS32: liveins: $a0, $a1
; MIPS32-NEXT: {{ $}}
; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load (s8))
; MIPS32-NEXT: G_STORE [[LOAD]](s32), [[COPY]](p0) :: (store (s8))
; MIPS32-NEXT: RetRA
%0:_(p0) = COPY $a0
%1:_(p0) = COPY $a1
%2:_(s8) = G_LOAD %1(p0) :: (load (s8))
G_STORE %2(s8), %0(p0) :: (store (s8))
RetRA
...
---
name: load_store_i16
alignment: 4
tracksRegLiveness: true
body: |
bb.0:
liveins: $a0, $a1
; MIPS32-LABEL: name: load_store_i16
; MIPS32: liveins: $a0, $a1
; MIPS32-NEXT: {{ $}}
; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load (s16))
; MIPS32-NEXT: G_STORE [[LOAD]](s32), [[COPY]](p0) :: (store (s16))
; MIPS32-NEXT: RetRA
%0:_(p0) = COPY $a0
%1:_(p0) = COPY $a1
%2:_(s16) = G_LOAD %1(p0) :: (load (s16))
G_STORE %2(s16), %0(p0) :: (store (s16))
RetRA
...
---
name: load_store_i32
alignment: 4
tracksRegLiveness: true
body: |
bb.0:
liveins: $a0, $a1
; MIPS32-LABEL: name: load_store_i32
; MIPS32: liveins: $a0, $a1
; MIPS32-NEXT: {{ $}}
; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY1]](p0) :: (load (s32))
; MIPS32-NEXT: G_STORE [[LOAD]](s32), [[COPY]](p0) :: (store (s32))
; MIPS32-NEXT: RetRA
%0:_(p0) = COPY $a0
%1:_(p0) = COPY $a1
%2:_(s32) = G_LOAD %1(p0) :: (load (s32))
G_STORE %2(s32), %0(p0) :: (store (s32))
RetRA
...
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