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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips -verify-machineinstrs < %s | FileCheck %s
define void @f1(ptr %p) {
; CHECK-LABEL: f1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lbu16 $2, 0($4)
; CHECK-NEXT: andi16 $2, $2, 1
; CHECK-NEXT: bnezc $2, $BB0_2
; CHECK-NEXT: # %bb.1: # %if.then
; CHECK-NEXT: li16 $2, 0
; CHECK-NEXT: sb16 $2, 0($4)
; CHECK-NEXT: $BB0_2: # %if.end
; CHECK-NEXT: jrc $ra
entry:
%0 = load i8, ptr %p, align 4
%a = zext i8 %0 to i32
%and = and i32 %a, 1
%cmp = icmp eq i32 %and, 0
br i1 %cmp, label %if.then, label %if.end
if.then:
store i8 0, ptr %p, align 1
br label %if.end
if.end:
ret void
}
define void @f2(ptr %p) {
; CHECK-LABEL: f2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lhu16 $2, 0($4)
; CHECK-NEXT: andi16 $2, $2, 2
; CHECK-NEXT: bnezc $2, $BB1_2
; CHECK-NEXT: # %bb.1: # %if.then
; CHECK-NEXT: li16 $2, 0
; CHECK-NEXT: sh16 $2, 0($4)
; CHECK-NEXT: $BB1_2: # %if.end
; CHECK-NEXT: jrc $ra
entry:
%0 = load i16, ptr %p, align 2
%a = zext i16 %0 to i32
%and = and i32 %a, 2
%cmp = icmp eq i32 %and, 0
br i1 %cmp, label %if.then, label %if.end
if.then:
store i16 0, ptr %p, align 2
br label %if.end
if.end:
ret void
}
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