File: named-register-o32.ll

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (29 lines) | stat: -rw-r--r-- 707 bytes parent folder | download | duplicates (19) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
 
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=mips -relocation-model=static -mattr=+noabicalls \
; RUN:   < %s | FileCheck %s

declare i32 @llvm.read_register.i32(metadata)

define i32 @get_gp() {
; CHECK-LABEL: get_gp:
; CHECK:       # %bb.0:
; CHECK-NEXT:    jr $ra
; CHECK-NEXT:    move $2, $gp
  %1 = call i32 @llvm.read_register.i32(metadata !0)
  ret i32 %1
}

define i32 @get_sp() {
; CHECK-LABEL: get_sp:
; CHECK:       # %bb.0:
; CHECK-NEXT:    jr $ra
; CHECK-NEXT:    move $2, $sp
  %1 = call i32 @llvm.read_register.i32(metadata !1)
  ret i32 %1
}

!llvm.named.register.$28 = !{!0}
!llvm.named.register.sp = !{!1}

!0 = !{!"$28"}
!1 = !{!"sp"}