File: div8.ll

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (22 lines) | stat: -rw-r--r-- 876 bytes parent folder | download | duplicates (15) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
 
; RUN: llc < %s | FileCheck %s
; ModuleID = '8div.c'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.6.6"

define signext i8 @test_div(i8 %dividend, i8 %divisor) nounwind ssp {
entry:
  %dividend.addr = alloca i8, align 2
  %divisor.addr = alloca i8, align 1
  %quotient = alloca i8, align 1
  store i8 %dividend, ptr %dividend.addr, align 2
  store i8 %divisor, ptr %divisor.addr, align 1
  %tmp = load i8, ptr %dividend.addr, align 2
  %tmp1 = load i8, ptr %divisor.addr, align 1
; Insist on i8->i32 zero extension, even though divb demands only i16:
; CHECK: movzbl {{.*}}%eax
; CHECK: divb
  %div = udiv i8 %tmp, %tmp1
  store i8 %div, ptr %quotient, align 1
  %tmp4 = load i8, ptr %quotient, align 1
  ret i8 %tmp4
}