File: AsmWriterPCRelOp.td

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (38 lines) | stat: -rw-r--r-- 934 bytes parent folder | download | duplicates (21) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
 
// RUN: llvm-tblgen -gen-asm-writer -I %p/../../include %s | FileCheck %s

include "llvm/Target/Target.td"

def ArchInstrInfo : InstrInfo { }

def Arch : Target {
  let InstructionSet = ArchInstrInfo;
}

def R0 : Register<"r0">;
def Reg : RegisterClass<"Reg", [i32], 0, (add R0)>;

def IntOperand: Operand<i32>;

def PCRelOperand : Operand<i32> {
  let OperandType = "OPERAND_PCREL";
}

def foo : Instruction {
  let OutOperandList = (outs);
  let InOperandList = (ins Reg:$reg, IntOperand:$imm);
  let AsmString = "foo $reg, $imm";
}

def bar : Instruction {
  let OutOperandList = (outs);
  let InOperandList = (ins Reg:$reg, PCRelOperand:$imm);
  let AsmString = "bar $reg, $imm";
}

// CHECK:      ArchInstPrinter::printInstruction(
// CHECK:      // bar, foo
// CHECK-NEXT: printOperand(MI, 0, O);
// CHECK:      // foo
// CHECK-NEXT: printOperand(MI, 1, O);
// CHECK:      // bar
// CHECK-NEXT: printOperand(MI, Address, 1, O);