File: pseudo-inst-expansion.td

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (37 lines) | stat: -rw-r--r-- 923 bytes parent folder | download | duplicates (21) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
 
// RUN: llvm-tblgen -gen-pseudo-lowering -I %p/../../include %s | FileCheck %s

include "llvm/Target/Target.td"

def TestTargetInstrInfo : InstrInfo;

def TestTarget : Target {
  let InstructionSet = TestTargetInstrInfo;
}

def REG : Register<"REG">;
def GPR : RegisterClass<"TestTarget", [i32], 32, (add REG)>;

class SysReg<bits<12> op> {
  bits<12> Encoding = op;
}
def SR : SysReg<0b111100001111>;

class Pseudo<dag outs, dag ins, list<dag> pattern>
    : Instruction {
  dag OutOperandList = outs;
  dag InOperandList = ins;
  let Pattern = pattern;
  let isPseudo = 1;
}

def INSTR : Instruction {
  let OutOperandList = (outs GPR:$rd);
  let InOperandList = (ins i32imm:$val);
  let Pattern = [];
}

def PSEUDO : Pseudo<(outs GPR:$rd), (ins),
                    [(set GPR:$rd, (i32 SR.Encoding))]>,
             PseudoInstExpansion<(INSTR GPR:$rd, SR.Encoding)>;

// CHECK: .addOperand(MCOperand::createImm(3855));