File: subreg-def0.mir

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (22 lines) | stat: -rw-r--r-- 915 bytes parent folder | download | duplicates (14) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
 
# REQUIRES: amdgpu-registered-target
# RUN: llvm-reduce -abort-on-invalid-reduction --delta-passes=instructions -mtriple=amdgcn-amd-amdhsa --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log
# RUN: FileCheck --match-full-lines --check-prefix=RESULT %s < %t

# CHECK-INTERESTINGNESS: V_ADD_U32

# RESULT: undef %{{[0-9]+}}.sub1:vreg_64 = IMPLICIT_DEF
# RESULT-NEXT: undef %{{[0-9]+}}.sub0:vreg_64 = IMPLICIT_DEF
# RESULT-NEXT: %1:vgpr_32 = V_ADD_U32_e32 %{{[0-9]+}}.sub0, %{{[0-9]+}}.sub1, implicit $exec
# RESULT-NEXT: S_ENDPGM 0, implicit %1

---
name:            f
tracksRegLiveness: true
body:             |
  bb.0:
    S_WAITCNT 0
    undef %0.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
    %0.sub0:vreg_64 = V_MOV_B32_e32 1, implicit $exec
    %1:vgpr_32 = V_ADD_U32_e32 %0.sub0, %0.sub1, implicit $exec
    S_ENDPGM 0, implicit %1
...