File: non_affine_conditional_nested.ll

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (70 lines) | stat: -rw-r--r-- 2,598 bytes parent folder | download | duplicates (5)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
; RUN: opt %loadPolly -polly-allow-nonaffine-branches -polly-print-scops -disable-output < %s | FileCheck %s
;
;    void f(int *A) {
;      for (int i = 0; i < 1024; i++)
;        if (A[i])
;          if (A[i - 1])
;            A[i] = A[i - 2];
;    }
;
; CHECK:    Region: %bb1---%bb18
; CHECK:    Max Loop Depth:  1
; CHECK:    Statements {
; CHECK:      Stmt_bb2__TO__bb16
; CHECK:            Schedule :=
; CHECK:                { Stmt_bb2__TO__bb16[i0] -> [i0] };
; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK:                { Stmt_bb2__TO__bb16[i0] -> MemRef_A[i0] };
; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK:                { Stmt_bb2__TO__bb16[i0] -> MemRef_A[-1 + i0] };
; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK:                { Stmt_bb2__TO__bb16[i0] -> MemRef_A[-2 + i0] };
; CHECK:            MayWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
; CHECK:                { Stmt_bb2__TO__bb16[i0] -> MemRef_A[i0] };
; CHECK:    }

target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

define void @f(ptr %A) {
bb:
  br label %bb1

bb1:                                              ; preds = %bb17, %bb
  %indvars.iv = phi i64 [ %indvars.iv.next, %bb17 ], [ 0, %bb ]
  %exitcond = icmp ne i64 %indvars.iv, 1024
  br i1 %exitcond, label %bb2, label %bb18

bb2:                                              ; preds = %bb1
  %tmp = getelementptr inbounds i32, ptr %A, i64 %indvars.iv
  %tmp3 = load i32, ptr %tmp, align 4
  %tmp4 = icmp eq i32 %tmp3, 0
  br i1 %tmp4, label %bb16, label %bb5

bb5:                                              ; preds = %bb2
  %tmp6 = add nsw i64 %indvars.iv, -1
  %tmp7 = getelementptr inbounds i32, ptr %A, i64 %tmp6
  %tmp8 = load i32, ptr %tmp7, align 4
  %tmp9 = icmp eq i32 %tmp8, 0
  br i1 %tmp9, label %bb15, label %bb10

bb10:                                             ; preds = %bb5
  %tmp11 = add nsw i64 %indvars.iv, -2
  %tmp12 = getelementptr inbounds i32, ptr %A, i64 %tmp11
  %tmp13 = load i32, ptr %tmp12, align 4
  %tmp14 = getelementptr inbounds i32, ptr %A, i64 %indvars.iv
  store i32 %tmp13, ptr %tmp14, align 4
  br label %bb15

bb15:                                             ; preds = %bb5, %bb10
  br label %bb16

bb16:                                             ; preds = %bb2, %bb15
  br label %bb17

bb17:                                             ; preds = %bb16
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  br label %bb1

bb18:                                             ; preds = %bb1
  ret void
}