File: scev-invalidated.ll

package info (click to toggle)
swiftlang 6.0.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid, trixie
  • size: 2,519,992 kB
  • sloc: cpp: 9,107,863; ansic: 2,040,022; asm: 1,135,751; python: 296,500; objc: 82,456; f90: 60,502; lisp: 34,951; pascal: 19,946; sh: 18,133; perl: 7,482; ml: 4,937; javascript: 4,117; makefile: 3,840; awk: 3,535; xml: 914; fortran: 619; cs: 573; ruby: 573
file content (24 lines) | stat: -rw-r--r-- 677 bytes parent folder | download | duplicates (5)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
; RUN: opt %loadPolly -polly-print-scops -disable-output < %s | FileCheck %s
;
; CHECK: Region: %if.then6---%return
;
target datalayout ="e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"

define void @arc_either() {
entry:
  %ang2.2.reg2mem = alloca i64
  br i1 undef, label %return, label %if.then6

if.then6:
  %rem7 = srem i64 undef, 1474560
  br i1 false, label %if.else, label %return

if.else:
  %add16 = add nsw i64 %rem7, 1474560
  %rem7.add16 = select i1 undef, i64 %rem7, i64 %add16
  store i64 %rem7.add16, ptr %ang2.2.reg2mem
  br label %return

return:
  ret void
}