File: combine-udivrem-use-bug.mir

package info (click to toggle)
swiftlang 6.1.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid
  • size: 2,791,604 kB
  • sloc: cpp: 9,901,740; ansic: 2,201,431; asm: 1,091,827; python: 308,252; objc: 82,166; f90: 80,126; lisp: 38,358; pascal: 25,559; sh: 20,429; ml: 5,058; perl: 4,745; makefile: 4,484; awk: 3,535; javascript: 3,018; xml: 918; fortran: 664; cs: 573; ruby: 396
file content (25 lines) | stat: -rw-r--r-- 936 bytes parent folder | download | duplicates (18) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
 
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -o - -mtriple=aarch64-unknown-unknown -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s | FileCheck %s
# Check that we don't miscompile this into G_UDIVREM because of the different
# first operands.
---
name:            no_combine_divrem_different_src1
body:             |
  bb.1:
    liveins: $w0

    ; CHECK-LABEL: name: no_combine_divrem_different_src1
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
    ; CHECK-NEXT: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[COPY]], [[COPY]]
    ; CHECK-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[UREM]], [[COPY]]
    ; CHECK-NEXT: $w0 = COPY [[UDIV]](s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:_(s32) = COPY $w0
    %1:_(s32) = G_UREM %0, %0
    %2:_(s32) = G_UDIV %1, %0
    $w0 = COPY %2(s32)
    RET_ReallyLR implicit $w0

...