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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
---
name: test_icmp
body: |
bb.0.entry:
; CHECK-LABEL: name: test_icmp
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x0
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(oge), [[COPY]](s64), [[COPY1]]
; CHECK-NEXT: $w0 = COPY [[FCMP]](s32)
; CHECK-NEXT: [[FCMP1:%[0-9]+]]:_(s32) = G_FCMP floatpred(uno), [[TRUNC]](s32), [[TRUNC1]]
; CHECK-NEXT: $w0 = COPY [[FCMP1]](s32)
%0:_(s64) = COPY $x0
%1:_(s64) = COPY $x0
%2:_(s32) = G_TRUNC %0(s64)
%3:_(s32) = G_TRUNC %1(s64)
%4:_(s32) = G_FCMP floatpred(oge), %0(s64), %1
$w0 = COPY %4(s32)
%5:_(s32) = G_FCMP floatpred(uno), %2(s32), %3
$w0 = COPY %5(s32)
...
---
name: legalize_v8s16
alignment: 4
legalized: true
body: |
bb.0:
liveins: $q0, $q1
; CHECK-LABEL: name: legalize_v8s16
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %lhs:_(<8 x s16>) = COPY $q0
; CHECK-NEXT: %rhs:_(<8 x s16>) = COPY $q1
; CHECK-NEXT: [[UV:%[0-9]+]]:_(<4 x s16>), [[UV1:%[0-9]+]]:_(<4 x s16>) = G_UNMERGE_VALUES %lhs(<8 x s16>)
; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x s32>) = G_FPEXT [[UV]](<4 x s16>)
; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(<4 x s32>) = G_FPEXT [[UV1]](<4 x s16>)
; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<4 x s16>), [[UV3:%[0-9]+]]:_(<4 x s16>) = G_UNMERGE_VALUES %rhs(<8 x s16>)
; CHECK-NEXT: [[FPEXT2:%[0-9]+]]:_(<4 x s32>) = G_FPEXT [[UV2]](<4 x s16>)
; CHECK-NEXT: [[FPEXT3:%[0-9]+]]:_(<4 x s32>) = G_FPEXT [[UV3]](<4 x s16>)
; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(<4 x s32>) = G_FCMP floatpred(oeq), [[FPEXT]](<4 x s32>), [[FPEXT2]]
; CHECK-NEXT: [[FCMP1:%[0-9]+]]:_(<4 x s32>) = G_FCMP floatpred(oeq), [[FPEXT1]](<4 x s32>), [[FPEXT3]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[FCMP]](<4 x s32>)
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[FCMP1]](<4 x s32>)
; CHECK-NEXT: %fcmp:_(<8 x s16>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s16>), [[TRUNC1]](<4 x s16>)
; CHECK-NEXT: $q0 = COPY %fcmp(<8 x s16>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
%lhs:_(<8 x s16>) = COPY $q0
%rhs:_(<8 x s16>) = COPY $q1
%fcmp:_(<8 x s16>) = G_FCMP floatpred(oeq), %lhs(<8 x s16>), %rhs
$q0 = COPY %fcmp(<8 x s16>)
RET_ReallyLR implicit $q0
...
---
name: legalize_v4s16
alignment: 4
legalized: true
body: |
bb.0:
liveins: $d0, $d1
; CHECK-LABEL: name: legalize_v4s16
; CHECK: liveins: $d0, $d1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %lhs:_(<4 x s16>) = COPY $d0
; CHECK-NEXT: %rhs:_(<4 x s16>) = COPY $d1
; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x s32>) = G_FPEXT %lhs(<4 x s16>)
; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(<4 x s32>) = G_FPEXT %rhs(<4 x s16>)
; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(<4 x s32>) = G_FCMP floatpred(oeq), [[FPEXT]](<4 x s32>), [[FPEXT1]]
; CHECK-NEXT: %fcmp:_(<4 x s16>) = G_TRUNC [[FCMP]](<4 x s32>)
; CHECK-NEXT: $d0 = COPY %fcmp(<4 x s16>)
; CHECK-NEXT: RET_ReallyLR implicit $d0
%lhs:_(<4 x s16>) = COPY $d0
%rhs:_(<4 x s16>) = COPY $d1
%fcmp:_(<4 x s16>) = G_FCMP floatpred(oeq), %lhs(<4 x s16>), %rhs
$d0 = COPY %fcmp(<4 x s16>)
RET_ReallyLR implicit $d0
|
