File: arm64-shrink-v1i64.ll

package info (click to toggle)
swiftlang 6.1.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid
  • size: 2,791,604 kB
  • sloc: cpp: 9,901,740; ansic: 2,201,431; asm: 1,091,827; python: 308,252; objc: 82,166; f90: 80,126; lisp: 38,358; pascal: 25,559; sh: 20,429; ml: 5,058; perl: 4,745; makefile: 4,484; awk: 3,535; javascript: 3,018; xml: 918; fortran: 664; cs: 573; ruby: 396
file content (14 lines) | stat: -rw-r--r-- 549 bytes parent folder | download | duplicates (31) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
 
; RUN: llc < %s -mtriple=arm64-eabi

; The DAGCombiner tries to do following shrink:
;     Convert x+y to (VT)((SmallVT)x+(SmallVT)y)
; But currently it can't handle vector type and will trigger an assertion failure
; when it tries to generate an add mixed using vector type and scalar type.
; This test checks that such assertion failur should not happen.
define <1 x i64> @dotest(<1 x i64> %in0) {
entry:
  %0 = add <1 x i64> %in0, %in0
  %vshl_n = shl <1 x i64> %0, <i64 32>
  %vsra_n = ashr <1 x i64> %vshl_n, <i64 32>
  ret <1 x i64> %vsra_n
}