File: phi-rv32.mir

package info (click to toggle)
swiftlang 6.1.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid
  • size: 2,791,604 kB
  • sloc: cpp: 9,901,740; ansic: 2,201,431; asm: 1,091,827; python: 308,252; objc: 82,166; f90: 80,126; lisp: 38,358; pascal: 25,559; sh: 20,429; ml: 5,058; perl: 4,745; makefile: 4,484; awk: 3,535; javascript: 3,018; xml: 918; fortran: 664; cs: 573; ruby: 396
file content (88 lines) | stat: -rw-r--r-- 2,512 bytes parent folder | download | duplicates (12)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=instruction-select -simplify-mir -verify-machineinstrs %s -o - \
# RUN: | FileCheck -check-prefix=RV32I %s

---
name:            phi_i32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  ; RV32I-LABEL: name: phi_i32
  ; RV32I: bb.0:
  ; RV32I-NEXT:   liveins: $x10, $x11, $x12
  ; RV32I-NEXT: {{  $}}
  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:gpr = COPY $x10
  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:gpr = COPY $x11
  ; RV32I-NEXT:   [[COPY2:%[0-9]+]]:gpr = COPY $x12
  ; RV32I-NEXT:   [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY]], 1
  ; RV32I-NEXT:   BNE [[ANDI]], $x0, %bb.2
  ; RV32I-NEXT:   PseudoBR %bb.1
  ; RV32I-NEXT: {{  $}}
  ; RV32I-NEXT: bb.1:
  ; RV32I-NEXT: {{  $}}
  ; RV32I-NEXT: bb.2:
  ; RV32I-NEXT:   [[PHI:%[0-9]+]]:gpr = PHI [[COPY2]], %bb.1, [[COPY1]], %bb.0
  ; RV32I-NEXT:   $x10 = COPY [[PHI]]
  ; RV32I-NEXT:   PseudoRET implicit $x10
  bb.0:
    liveins: $x10, $x11, $x12

    %0:gprb(s32) = COPY $x10
    %1:gprb(s32) = COPY $x11
    %2:gprb(s32) = COPY $x12
    %3:gprb(s32) = G_CONSTANT i32 1
    %4:gprb(s32) = G_AND %0, %3
    G_BRCOND %4(s32), %bb.2
    G_BR %bb.1

  bb.1:

  bb.2:
    %5:gprb(s32) = G_PHI %2(s32), %bb.1, %1(s32), %bb.0
    $x10 = COPY %5(s32)
    PseudoRET implicit $x10

...
---
name:            phi_ptr
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  ; RV32I-LABEL: name: phi_ptr
  ; RV32I: bb.0.entry:
  ; RV32I-NEXT:   liveins: $x10, $x11, $x12
  ; RV32I-NEXT: {{  $}}
  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:gpr = COPY $x10
  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:gpr = COPY $x11
  ; RV32I-NEXT:   [[COPY2:%[0-9]+]]:gpr = COPY $x12
  ; RV32I-NEXT:   [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY]], 1
  ; RV32I-NEXT:   BNE [[ANDI]], $x0, %bb.2
  ; RV32I-NEXT:   PseudoBR %bb.1
  ; RV32I-NEXT: {{  $}}
  ; RV32I-NEXT: bb.1:
  ; RV32I-NEXT: {{  $}}
  ; RV32I-NEXT: bb.2:
  ; RV32I-NEXT:   [[PHI:%[0-9]+]]:gpr = PHI [[COPY2]], %bb.1, [[COPY1]], %bb.0
  ; RV32I-NEXT:   $x10 = COPY [[PHI]]
  ; RV32I-NEXT:   PseudoRET implicit $x10
  bb.0.entry:
    liveins: $x10, $x11, $x12

    %0:gprb(s32) = COPY $x10
    %1:gprb(p0) = COPY $x11
    %2:gprb(p0) = COPY $x12
    %3:gprb(s32) = G_CONSTANT i32 1
    %4:gprb(s32) = G_AND %0, %3
    G_BRCOND %4(s32), %bb.2
    G_BR %bb.1

  bb.1:

  bb.2:
    %5:gprb(p0) = G_PHI %2(p0), %bb.1, %1(p0), %bb.0
    $x10 = COPY %5(p0)
    PseudoRET implicit $x10

...