1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
define void @trunc_one_add(ptr %a, i8 %b) {
; CHECK-LABEL: @trunc_one_add(
; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[B:%.*]] to i16
; CHECK-NEXT: [[SHR:%.*]] = lshr i16 [[ZEXT]], 1
; CHECK-NEXT: [[ADD:%.*]] = add i16 [[ZEXT]], [[SHR]]
; CHECK-NEXT: store i16 [[ADD]], ptr [[A:%.*]], align 2
; CHECK-NEXT: ret void
;
%zext = zext i8 %b to i32
%shr = lshr i32 %zext, 1
%add = add nsw i32 %zext, %shr
%trunc = trunc i32 %add to i16
store i16 %trunc, ptr %a, align 2
ret void
}
define void @trunc_two_adds(ptr %a, i8 %b, i8 %c) {
; CHECK-LABEL: @trunc_two_adds(
; CHECK-NEXT: [[ZEXT1:%.*]] = zext i8 [[B:%.*]] to i16
; CHECK-NEXT: [[ZEXT2:%.*]] = zext i8 [[C:%.*]] to i16
; CHECK-NEXT: [[ADD1:%.*]] = add i16 [[ZEXT1]], [[ZEXT2]]
; CHECK-NEXT: [[SHR1:%.*]] = lshr i16 [[ADD1]], 1
; CHECK-NEXT: [[ADD2:%.*]] = add i16 [[ADD1]], [[SHR1]]
; CHECK-NEXT: [[SHR2:%.*]] = lshr i16 [[ADD2]], 2
; CHECK-NEXT: store i16 [[SHR2]], ptr [[A:%.*]], align 2
; CHECK-NEXT: ret void
;
%zext1 = zext i8 %b to i32
%zext2 = zext i8 %c to i32
%add1 = add nuw nsw i32 %zext1, %zext2
%shr1 = lshr i32 %add1, 1
%add2 = add nuw nsw i32 %add1, %shr1
%shr2 = lshr i32 %add2, 2
%trunc = trunc i32 %shr2 to i16
store i16 %trunc, ptr %a, align 2
ret void
}
|
