File: 2008-07-11-RemAnd.ll

package info (click to toggle)
swiftlang 6.1.3-2
  • links: PTS, VCS
  • area: main
  • in suites: forky, sid
  • size: 2,791,604 kB
  • sloc: cpp: 9,901,740; ansic: 2,201,431; asm: 1,091,827; python: 308,252; objc: 82,166; f90: 80,126; lisp: 38,358; pascal: 25,559; sh: 20,429; ml: 5,058; perl: 4,745; makefile: 4,484; awk: 3,535; javascript: 3,018; xml: 918; fortran: 664; cs: 573; ruby: 396
file content (27 lines) | stat: -rw-r--r-- 708 bytes parent folder | download | duplicates (12) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
 
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
; PR2330

define i32 @a(i32 %b) nounwind  {
; CHECK-LABEL: @a(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[TMP0:%.*]] = and i32 [[B:%.*]], 1
; CHECK-NEXT:    ret i32 [[TMP0]]
;
entry:
  srem i32 %b, 8		; <i32>:0 [#uses=1]
  and i32 %0, 1		; <i32>:1 [#uses=1]
  ret i32 %1
}

define <2 x i32> @a_vec(<2 x i32> %b) nounwind  {
; CHECK-LABEL: @a_vec(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[TMP0:%.*]] = and <2 x i32> [[B:%.*]], <i32 1, i32 1>
; CHECK-NEXT:    ret <2 x i32> [[TMP0]]
;
entry:
  srem <2 x i32> %b, <i32 8, i32 8>
  and <2 x i32> %0, <i32 1, i32 1>
  ret <2 x i32> %1
}