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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define <2 x ptr> @testa(<2 x ptr> %a) {
; CHECK-LABEL: @testa(
; CHECK-NEXT: [[G:%.*]] = getelementptr i8, <2 x ptr> [[A:%.*]], <2 x i64> <i64 0, i64 1>
; CHECK-NEXT: ret <2 x ptr> [[G]]
;
%g = getelementptr i8, <2 x ptr> %a, <2 x i32> <i32 0, i32 1>
ret <2 x ptr> %g
}
define <8 x ptr> @vgep_s_v8i64(ptr %a, <8 x i64>%i) {
; CHECK-LABEL: @vgep_s_v8i64(
; CHECK-NEXT: [[VECTORGEP:%.*]] = getelementptr double, ptr [[A:%.*]], <8 x i64> [[I:%.*]]
; CHECK-NEXT: ret <8 x ptr> [[VECTORGEP]]
;
%VectorGep = getelementptr double, ptr %a, <8 x i64> %i
ret <8 x ptr> %VectorGep
}
define <8 x ptr> @vgep_s_v8i32(ptr %a, <8 x i32>%i) {
; CHECK-LABEL: @vgep_s_v8i32(
; CHECK-NEXT: [[TMP1:%.*]] = sext <8 x i32> [[I:%.*]] to <8 x i64>
; CHECK-NEXT: [[VECTORGEP:%.*]] = getelementptr double, ptr [[A:%.*]], <8 x i64> [[TMP1]]
; CHECK-NEXT: ret <8 x ptr> [[VECTORGEP]]
;
%VectorGep = getelementptr double, ptr %a, <8 x i32> %i
ret <8 x ptr> %VectorGep
}
define <8 x ptr> @vgep_v8iPtr_i32(<8 x ptr> %a, i32 %i) {
; CHECK-LABEL: @vgep_v8iPtr_i32(
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I:%.*]] to i64
; CHECK-NEXT: [[VECTORGEP:%.*]] = getelementptr i8, <8 x ptr> [[A:%.*]], i64 [[TMP1]]
; CHECK-NEXT: ret <8 x ptr> [[VECTORGEP]]
;
%VectorGep = getelementptr i8, <8 x ptr> %a, i32 %i
ret <8 x ptr> %VectorGep
}
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