1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
|
/*
* Copyright (C) 2015 Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/types.h>
#include <malloc.h>
#include <net.h>
#include <linux/compat.h>
#include <asm/arch/fsl_serdes.h>
#include <fsl-mc/ldpaa_wriop.h>
struct wriop_dpmac_info dpmac_info[NUM_WRIOP_PORTS];
__weak phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtc)
{
return PHY_INTERFACE_MODE_NONE;
}
void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl)
{
phy_interface_t enet_if;
dpmac_info[dpmac_id].enabled = 0;
dpmac_info[dpmac_id].id = 0;
dpmac_info[dpmac_id].phy_addr = -1;
dpmac_info[dpmac_id].enet_if = PHY_INTERFACE_MODE_NONE;
enet_if = wriop_dpmac_enet_if(dpmac_id, lane_prtcl);
if (enet_if != PHY_INTERFACE_MODE_NONE) {
dpmac_info[dpmac_id].enabled = 1;
dpmac_info[dpmac_id].id = dpmac_id;
dpmac_info[dpmac_id].enet_if = enet_if;
}
}
/*TODO what it do */
static int wriop_dpmac_to_index(int dpmac_id)
{
int i;
for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
if (dpmac_info[i].id == dpmac_id)
return i;
}
return -1;
}
void wriop_disable_dpmac(int dpmac_id)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return;
dpmac_info[i].enabled = 0;
wriop_dpmac_disable(dpmac_id);
}
void wriop_enable_dpmac(int dpmac_id)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return;
dpmac_info[i].enabled = 1;
wriop_dpmac_enable(dpmac_id);
}
u8 wriop_is_enabled_dpmac(int dpmac_id)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return -1;
return dpmac_info[i].enabled;
}
void wriop_set_mdio(int dpmac_id, struct mii_dev *bus)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return;
dpmac_info[i].bus = bus;
}
struct mii_dev *wriop_get_mdio(int dpmac_id)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return NULL;
return dpmac_info[i].bus;
}
void wriop_set_phy_address(int dpmac_id, int address)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return;
dpmac_info[i].phy_addr = address;
}
int wriop_get_phy_address(int dpmac_id)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return -1;
return dpmac_info[i].phy_addr;
}
void wriop_set_phy_dev(int dpmac_id, struct phy_device *phydev)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return;
dpmac_info[i].phydev = phydev;
}
struct phy_device *wriop_get_phy_dev(int dpmac_id)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return NULL;
return dpmac_info[i].phydev;
}
phy_interface_t wriop_get_enet_if(int dpmac_id)
{
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return PHY_INTERFACE_MODE_NONE;
if (dpmac_info[i].enabled)
return dpmac_info[i].enet_if;
return PHY_INTERFACE_MODE_NONE;
}
|
