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|
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2019 NXP
*/
#include "imx8mm-u-boot.dtsi"
/ {
firmware {
optee {
compatible = "linaro,optee-tz";
method = "smc";
};
};
wdt-reboot {
compatible = "wdt-reboot";
u-boot,dm-spl;
wdt = <&wdog1>;
};
};
&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} {
u-boot,dm-spl;
};
&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} {
u-boot,dm-spl;
};
&binman_fip {
arch = "arm64";
compression = "none";
description = "Trusted Firmware FIP";
load = <0x40310000>;
type = "firmware";
fip_blob {
filename = "fip.bin";
type = "blob-ext";
};
};
&binman_configuration {
loadables = "atf", "fip";
};
&fec1 {
phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
};
&gpio1 {
u-boot,dm-spl;
};
&gpio2 {
u-boot,dm-spl;
};
&gpio3 {
u-boot,dm-spl;
};
&gpio4 {
u-boot,dm-spl;
};
&gpio5 {
u-boot,dm-spl;
};
&i2c1 {
u-boot,dm-spl;
};
&i2c2 {
u-boot,dm-spl;
};
&pinctrl_i2c2 {
u-boot,dm-spl;
};
&pinctrl_pmic {
u-boot,dm-spl;
};
&pinctrl_uart3 {
u-boot,dm-spl;
};
&pinctrl_usdhc2 {
u-boot,dm-spl;
};
&pinctrl_usdhc2_gpio {
u-boot,dm-spl;
};
&pinctrl_usdhc3 {
u-boot,dm-spl;
};
&uart3 {
u-boot,dm-spl;
};
&usdhc1 {
u-boot,dm-spl;
};
&usdhc2 {
u-boot,dm-spl;
};
&usdhc3 {
u-boot,dm-spl;
};
&wdog1 {
u-boot,dm-spl;
};
|
