1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016-2020 Hitachi Power Grids
*/
#include "socfpga_arria5.dtsi"
#include "socfpga-common-u-boot.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Hitachi PG SoC SECU1 Board";
compatible = "altr,socfpga-secu1", "altr,socfpga";
chosen {
stdout-path = "serial0:115200n8";
bootargs = "console=ttyS0,115200";
};
memory {
name = "memory";
device_type = "memory";
reg = <0x0 0x20000000>; /* 512MB */
};
aliases {
/*
* this allow the ethaddr uboot environment variable contents
* to be added to the gmac0 device tree blob.
*/
ethernet0 = &gmac0;
spi0 = &spi1;
};
bootcount@0 {
compatible = "u-boot,bootcount-rtc";
rtc = <&rtc>;
offset = <0x9e>;
};
i2c_gpio: i2c@0 {
compatible = "i2c-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpios = <&portc 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* SDA */
&portc 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* SCL */
i2c-gpio,delay-us = <5>; /* ~100 kHz */
i2c-gpio,deblock;
temp_sensor@48 {
compatible = "national,lm75";
reg = <0x48>;
};
eeprom@50 {
compatible = "at,24c08";
reg = <0x50>;
};
rtc: rtc@68 {
compatible = "st,m41st87";
reg = <0x68>;
interrupt-parent = <&intc>;
interrupts = <0 42 0x4>;
};
};
regulator_3_3v: 3-3-v-regulator {
compatible = "regulator-fixed";
regulator-name = "3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&mmc0 {
vmmc-supply = <®ulator_3_3v>;
vqmmc-supply = <®ulator_3_3v>;
bus-width = <4>;
u-boot,dm-pre-reloc;
};
&nand0 {
status = "okay";
};
&porta {
bank-name = "porta";
};
&portb {
bank-name = "portb";
};
&portc {
bank-name = "portc";
};
&spi1 {
status = "okay";
};
&uart0 {
clock-frequency = <100000000>;
u-boot,dm-pre-reloc;
status = "okay";
};
&uart1 {
clock-frequency = <100000000>;
};
&watchdog0 {
u-boot,dm-pre-reloc;
status = "okay";
};
|
