File: ext_fifo_tb.prj

package info (click to toggle)
uhd 3.13.1.0-3
  • links: PTS, VCS
  • area: main
  • in suites: buster
  • size: 207,120 kB
  • sloc: cpp: 167,245; ansic: 86,841; vhdl: 53,420; python: 40,839; xml: 13,167; tcl: 5,688; makefile: 2,167; sh: 1,719; pascal: 230; csh: 94; asm: 20; perl: 11
file content (9 lines) | stat: -rw-r--r-- 358 bytes parent folder | download | duplicates (10)
1
2
3
4
5
6
7
8
9
verilog work "./ext_fifo_tb.v"
verilog work "./ext_fifo.v"
verilog work "./nobl_fifo.v"
verilog work "./nobl_if.v"
verilog work "../coregen/fifo_xlnx_512x36_2clk_36to18.v"
verilog work "../coregen/fifo_xlnx_512x36_2clk_18to36.v"
verilog work "../models/CY7C1356C/cy1356.v"
verilog work "../models/idt71v65603s150.v"
verilog work "$XILINX/verilog/src/glbl.v"