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module noc_block_digital_gain #(
parameter NOC_ID = 64'hB160_0000_0000_0000,
parameter STR_SINK_FIFOSIZE = 11)
(
input bus_clk, input bus_rst,
input ce_clk, input ce_rst,
input [63:0] i_tdata, input i_tlast, input i_tvalid, output i_tready,
output [63:0] o_tdata, output o_tlast, output o_tvalid, input o_tready,
output [63:0] debug
);
////////////////////////////////////////////////////////////
//
// RFNoC Shell
//
////////////////////////////////////////////////////////////
wire [31:0] set_data;
wire [7:0] set_addr;
wire set_stb;
reg [63:0] rb_data;
wire [7:0] rb_addr;
wire [63:0] cmdout_tdata, ackin_tdata;
wire cmdout_tlast, cmdout_tvalid, cmdout_tready, ackin_tlast, ackin_tvalid, ackin_tready;
wire [63:0] str_sink_tdata, str_src_tdata;
wire str_sink_tlast, str_sink_tvalid, str_sink_tready, str_src_tlast, str_src_tvalid, str_src_tready;
wire [15:0] src_sid;
wire [15:0] next_dst_sid, resp_out_dst_sid;
wire [15:0] resp_in_dst_sid;
wire clear_tx_seqnum;
noc_shell #(
.NOC_ID(NOC_ID),
.STR_SINK_FIFOSIZE(STR_SINK_FIFOSIZE))
noc_shell (
.bus_clk(bus_clk), .bus_rst(bus_rst),
.i_tdata(i_tdata), .i_tlast(i_tlast), .i_tvalid(i_tvalid), .i_tready(i_tready),
.o_tdata(o_tdata), .o_tlast(o_tlast), .o_tvalid(o_tvalid), .o_tready(o_tready),
// Computer Engine Clock Domain
.clk(ce_clk), .reset(ce_rst),
// Control Sink
.set_data(set_data), .set_addr(set_addr), .set_stb(set_stb),
.rb_stb(1'b1), .rb_data(rb_data), .rb_addr(rb_addr),
// Control Source
.cmdout_tdata(cmdout_tdata), .cmdout_tlast(cmdout_tlast), .cmdout_tvalid(cmdout_tvalid), .cmdout_tready(cmdout_tready),
.ackin_tdata(ackin_tdata), .ackin_tlast(ackin_tlast), .ackin_tvalid(ackin_tvalid), .ackin_tready(ackin_tready),
// Stream Sink
.str_sink_tdata(str_sink_tdata), .str_sink_tlast(str_sink_tlast), .str_sink_tvalid(str_sink_tvalid), .str_sink_tready(str_sink_tready),
// Stream Source
.str_src_tdata(str_src_tdata), .str_src_tlast(str_src_tlast), .str_src_tvalid(str_src_tvalid), .str_src_tready(str_src_tready),
// Stream IDs set by host
.src_sid(src_sid), // SID of this block
.next_dst_sid(next_dst_sid), // Next destination SID
.resp_in_dst_sid(resp_in_dst_sid), // Response destination SID for input stream responses / errors
.resp_out_dst_sid(resp_out_dst_sid), // Response destination SID for output stream responses / errors
// Misc
.vita_time('d0), .clear_tx_seqnum(clear_tx_seqnum),
.debug(debug));
////////////////////////////////////////////////////////////
//
// AXI Wrapper
// Convert RFNoC Shell interface into AXI stream interface
//
////////////////////////////////////////////////////////////
wire [31:0] m_axis_data_tdata;
wire m_axis_data_tlast;
wire m_axis_data_tvalid;
wire m_axis_data_tready;
wire [31:0] s_axis_data_tdata;
wire s_axis_data_tlast;
wire s_axis_data_tvalid;
wire s_axis_data_tready;
axi_wrapper #(
.SIMPLE_MODE(1))
axi_wrapper (
.bus_clk(bus_clk), .bus_rst(bus_rst),
.clk(ce_clk), .reset(ce_rst),
.clear_tx_seqnum(clear_tx_seqnum),
.next_dst(next_dst_sid),
.set_stb(set_stb), .set_addr(set_addr), .set_data(set_data),
.i_tdata(str_sink_tdata), .i_tlast(str_sink_tlast), .i_tvalid(str_sink_tvalid), .i_tready(str_sink_tready),
.o_tdata(str_src_tdata), .o_tlast(str_src_tlast), .o_tvalid(str_src_tvalid), .o_tready(str_src_tready),
.m_axis_data_tdata(m_axis_data_tdata),
.m_axis_data_tlast(m_axis_data_tlast),
.m_axis_data_tvalid(m_axis_data_tvalid),
.m_axis_data_tready(m_axis_data_tready),
.m_axis_data_tuser(),
.s_axis_data_tdata(s_axis_data_tdata),
.s_axis_data_tlast(s_axis_data_tlast),
.s_axis_data_tvalid(s_axis_data_tvalid),
.s_axis_data_tready(s_axis_data_tready),
.s_axis_data_tuser(),
.m_axis_config_tdata(),
.m_axis_config_tlast(),
.m_axis_config_tvalid(),
.m_axis_config_tready(),
.m_axis_pkt_len_tdata(),
.m_axis_pkt_len_tvalid(),
.m_axis_pkt_len_tready());
////////////////////////////////////////////////////////////
//
// User code
//
////////////////////////////////////////////////////////////
// NoC Shell registers 0 - 127,
// User register address space starts at 128
localparam SR_USER_REG_BASE = 128;
// Control Source Unused
assign cmdout_tdata = 64'd0;
assign cmdout_tlast = 1'b0;
assign cmdout_tvalid = 1'b0;
assign ackin_tready = 1'b1;
localparam [7:0] SR_GAIN = SR_USER_REG_BASE;
localparam [7:0] RB_GAIN = 0;
wire [15:0] gain;
setting_reg #(
.my_addr(SR_GAIN), .awidth(8), .width(16))
set_gain (
.clk(ce_clk), .rst(ce_rst),
.strobe(set_stb), .addr(set_addr), .in(set_data), .out(gain), .changed());
// Readback registers
// rb_stb set to 1'b1 on NoC Shell
always @(posedge ce_clk) begin
case(rb_addr)
RB_GAIN : rb_data <= {32'd0, 16'd0, gain};
default : rb_data <= 64'h0BADC0DE0BADC0DE;
endcase
end
wire [95:0] mult_tdata;
wire mult_tlast;
wire mult_tvalid;
wire mult_tready;
mult_rc #(.WIDTH_REAL(16), .WIDTH_CPLX(16), .WIDTH_P(32), .DROP_TOP_P(5), .LATENCY(4)) mult_rc (
.clk(ce_clk), .reset(ce_rst | clear_tx_seqnum),
.real_tdata(gain), .real_tlast(1'b0), .real_tvalid(1'b1), .real_tready(),
.cplx_tdata(m_axis_data_tdata), .cplx_tlast(m_axis_data_tlast), .cplx_tvalid(m_axis_data_tvalid), .cplx_tready(m_axis_data_tready),
.p_tdata(mult_tdata), .p_tlast(mult_tlast), .p_tvalid(mult_tvalid), .p_tready(mult_tready));
axi_clip_complex #(.WIDTH_IN(32), .WIDTH_OUT(16)) axi_clip_complex (
.clk(ce_clk), .reset(ce_rst | clear_tx_seqnum),
.i_tdata(mult_tdata), .i_tlast(mult_tlast), .i_tvalid(mult_tvalid), .i_tready(mult_tready),
.o_tdata(s_axis_data_tdata), .o_tlast(s_axis_data_tlast), .o_tvalid(s_axis_data_tvalid), .o_tready(s_axis_data_tready));
endmodule
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