File: Makefile.srcs

package info (click to toggle)
uhd 3.13.1.0-3
  • links: PTS, VCS
  • area: main
  • in suites: buster
  • size: 207,120 kB
  • sloc: cpp: 167,245; ansic: 86,841; vhdl: 53,420; python: 40,839; xml: 13,167; tcl: 5,688; makefile: 2,167; sh: 1,719; pascal: 230; csh: 94; asm: 20; perl: 11
file content (14 lines) | stat: -rw-r--r-- 364 bytes parent folder | download | duplicates (7) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
 
#
# Copyright 2013 Ettus Research LLC
#

##################################################
# Control Lib Sources
##################################################
WB_SPI_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/wb_spi/, \
rtl/verilog/spi_clgen.v \
rtl/verilog/spi_defines.v \
rtl/verilog/spi_shift.v \
rtl/verilog/spi_top16.v \
rtl/verilog/spi_top.v \
))