File: coregen.cgp

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uhd 3.15.0.0-4
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SET busformat = BusFormatAngleBracketNotRipped
SET designentry = Verilog
SET device = xc6slx150
SET devicefamily = spartan6
SET flowvendor = Foundation_ISE
SET package = csg484
SET speedgrade = -3
SET verilogsim = true
SET vhdlsim = false