File: mult.v

package info (click to toggle)
uhd 3.7.3-1
  • links: PTS
  • area: main
  • in suites: jessie, jessie-kfreebsd
  • size: 456,376 kB
  • ctags: 89,637
  • sloc: ansic: 51,090; cpp: 42,755; xml: 19,627; vhdl: 12,678; tcl: 5,944; python: 5,870; ada: 2,760; sh: 2,175; makefile: 615; pascal: 230; csh: 224; perl: 11
file content (16 lines) | stat: -rw-r--r-- 354 bytes parent folder | download | duplicates (11) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
 


module mult (input clock, input signed [15:0] x, input signed [15:0] y, output reg signed [30:0] product,
	     input enable_in, output reg enable_out );

   always @(posedge clock)
     if(enable_in)
       product <= #1 x*y;
     else
       product <= #1 31'd0;
   
   always @(posedge clock)
     enable_out <= #1 enable_in;
   
endmodule // mult