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uhd 3.9.5-2
  • links: PTS, VCS
  • area: main
  • in suites: stretch
  • size: 107,272 kB
  • ctags: 57,231
  • sloc: cpp: 66,160; ansic: 59,349; python: 13,245; vhdl: 7,651; tcl: 2,668; sh: 1,634; makefile: 1,031; xml: 557; pascal: 230; csh: 94; asm: 20; perl: 11

Folder: x300

d .. (parent)
d d rwxr-xr-x 4,096 coregen_dsp
d d rwxr-xr-x 4,096 ip
d d rwxr-xr-x 4,096 sim
- - rw-r--r-- 45 .gitignore
- - rw-r--r-- 4,228 Makefile
- - rw-r--r-- 2,662 Makefile.x300.inc
- - rw-r--r-- 1,040 build_x300.tcl
- - rw-r--r-- 23,463 bus_int.v
- - rw-r--r-- 8,560 capture_ddrlvds.v
- - rw-r--r-- 3,275 gen_ddrlvds.v
- - rw-r--r-- 309 setupenv.sh
- - rw-r--r-- 19,087 soft_ctrl.v
- - rw-r--r-- 45,029 timing.xdc
- - rw-r--r-- 60,019 x300.v
- - rw-r--r-- 35,133 x300.xdc
- - rw-r--r-- 992 x300_10ge.xdc
- - rw-r--r-- 355 x300_10ge_port0.xdc
- - rw-r--r-- 320 x300_10ge_port1.xdc
- - rw-r--r-- 1,052 x300_1ge.xdc
- - rw-r--r-- 52,776 x300_core.v
- - rw-r--r-- 410 x300_dram.xdc
- - rw-r--r-- 21,742 x300_pcie_int.v
- - rw-r--r-- 716 x300_zpu_config.vhd
- - rw-r--r-- 22,290 x3x0_base.lvbitx