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vbpp 1.1.0-6
  • links: PTS
  • area: main
  • in suites: etch, etch-m68k, lenny
  • size: 484 kB
  • ctags: 277
  • sloc: sh: 2,795; ansic: 1,474; lex: 1,097; yacc: 511; makefile: 157
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Source: vbpp
Section: electronics
Priority: optional
Maintainer: Debian QA Group <packages@qa.debian.org>
Build-Depends: debhelper (>= 4.0.0), flex-old, bison
Standards-Version: 3.7.2

Package: vbpp
Architecture: any
Depends: ${shlibs:Depends}, ${misc:Depends}
Suggests: vbs
Description: Verilog preprocessor
 VBPP is a Verilog preprocessor. It has support for most Verilog
 preprocessing directives and additional directives such as:
 .
  * Statement generator ('generate' command in VHDL).
  * Expression evaluation.
  * Mathematical functions: log2, ceil, floor, round, abs, etc.
  * Conditionals: if, switch, etc.