File: t_var_escape.out

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$version Generated by SpTraceVcd $end
$date Fri Nov 13 19:14:12 2009
 $end
$timescale 1ns $end

 $scope module top $end
  $var wire  1 * 9num $end
  $var wire  1 + bra[ket]slash/dash-colon:9backslash\done $end
  $var wire  1 ' clk $end
  $var wire  1 ) double__underscore $end
  $var wire  1 ( escaped_normal $end
  $scope module v $end
   $var wire  1 * 9num $end
   $var wire 32 & a0.cyc [31:0] $end
   $var wire  1 + bra[ket]slash/dash-colon:9backslash\done $end
   $var wire  1 $ check:alias $end
   $var wire  1 % check;alias $end
   $var wire  1 $ check_alias $end
   $var wire  1 ' clk $end
   $var wire 32 # cyc [31:0] $end
   $var wire  1 ) double__underscore $end
   $var wire  1 ( escaped_normal $end
   $var wire 32 & other.cyc [31:0] $end
   $var wire  1 $ wire $end
   $scope module a0 $end
    $var wire 32 # cyc [31:0] $end
   $upscope $end
   $scope module mod.with_dot $end
    $var wire 32 # cyc [31:0] $end
   $upscope $end
  $upscope $end
 $upscope $end
$enddefinitions $end


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