File: t_assert_synth_full.out

package info (click to toggle)
verilator 4.038-1
  • links: PTS, VCS
  • area: main
  • in suites:
  • size: 29,596 kB
  • sloc: cpp: 90,585; perl: 15,101; ansic: 8,573; yacc: 3,626; lex: 1,616; makefile: 1,101; sh: 175; python: 145
file content (3 lines) | stat: -rw-r--r-- 159 bytes parent folder | download | duplicates (2)
1
2
3
[40] %Error: t_assert_synth.v:31: Assertion failed in top.t: synthesis full_case, but non-match found
%Error: t/t_assert_synth.v:31: Verilog $stop
Aborting...