File: t_inst_misarray2_bad.out

package info (click to toggle)
verilator 5.032-1
  • links: PTS, VCS
  • area: main
  • in suites: trixie
  • size: 93,932 kB
  • sloc: cpp: 131,288; python: 19,365; ansic: 10,234; yacc: 5,733; lex: 1,905; makefile: 1,229; sh: 489; perl: 282; fortran: 22
file content (5 lines) | stat: -rw-r--r-- 344 bytes parent folder | download
1
2
3
4
5
%Error: t/t_inst_misarray2_bad.v:10:17: Illegal input port connection 'i_data', mismatch between port which is not an array, and expression which is an array. (IEEE 1800-2023 7.6)
                                      : ... note: In instance 't'
   10 |                .i_data(fft_oQ[6:0])
      |                 ^~~~~~
%Error: Exiting due to