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#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator')
test.top_filename = "t/t_flag_make_cmake.v"
test.compile(verilator_flags2=[
'--exe --cc --build -j 10 --build-jobs 2 --stats', '../' + test.main_filename
])
test.execute()
test.file_grep(test.stats, r'Build jobs: 2')
test.passes()
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