File: t_split_var_0.vlt

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// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2020 by Marco Widmer.
// SPDX-License-Identifier: CC0-1.0

`verilator_config

split_var -module "barshift_1d_unpacked" -var "tmp"