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%Error: t/t_var_dup2_bad.v:13:9: Duplicate declaration of signal: 'bad_o_w'
: ... note: ANSI ports must have type declared with the I/O (IEEE 1800-2023 23.2.2.2)
13 | wire bad_o_w;
| ^~~~~~~
t/t_var_dup2_bad.v:10:11: ... Location of original declaration
10 | output bad_o_w,
| ^~~~~~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_var_dup2_bad.v:14:9: Duplicate declaration of signal: 'bad_o_r'
14 | reg bad_o_r;
| ^~~~~~~
t/t_var_dup2_bad.v:11:11: ... Location of original declaration
11 | output bad_o_r);
| ^~~~~~~
%Error: t/t_var_dup2_bad.v:17:9: Duplicate declaration of signal: 'bad_w_r'
17 | reg bad_w_r;
| ^~~~~~~
t/t_var_dup2_bad.v:16:9: ... Location of original declaration
16 | wire bad_w_r;
| ^~~~~~~
%Error: t/t_var_dup2_bad.v:20:9: Duplicate declaration of signal: 'bad_r_w'
20 | reg bad_r_w;
| ^~~~~~~
t/t_var_dup2_bad.v:19:9: ... Location of original declaration
19 | wire bad_r_w;
| ^~~~~~~
%Error: Exiting due to
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